参数资料
型号: SC493ULTRT
厂商: Semtech
文件页数: 14/28页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM MLPQ-20
标准包装: 1
系列: EcoSpeed®, SmartDrive™
PWM 型: 控制器
输出数: 1
频率 - 最大: 1MHz
电源电压: 3 V ~ 5.5 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 20-MLPQ
包装: 标准包装
其它名称: SC493ULTRTDKR
SC493
Applications Information (continued)
capacitor from 0V to the voltage at the positive input. This
makes the on-time proportional to the output voltage and
inversely proportional to the input voltage, providing a near-
constant switching frequency when the input and output
voltage vary. A second comparator compares the voltage at
the feedback pin to a fixed internal reference voltage to
determine when to turn on the high side MOSFET.
Power-on Delay Programming
The power-on delay is programmable via the I 2 C interface.
The power-on delay is defined as the time from when the
ENSW bit is set to when the PWM control is enabled and the
part begins switching. At the end of the power-on delay time,
the PWM control circuit is enabled in a phased manner to
ensure proper operation. The phased enabling of internal
circuitry adds up to 48μs to the power-on delay time. On start-
up (controller enabled by applying power and driving the EN
pin high). The controller can take up to 1ms for internal
initialization following which the power-on delay is applied.
Soft-Start Operation and Programming
Soft-start is achieved in the PWM controller by using an
internal voltage ramp as the reference for the FB Comparator.
The voltage ramp is generated using an internal charge
pump which drives the reference from zero to 500mV in ~
2mV increments, using an internal oscillator. When the
ramp voltage reaches 500mV, the ramp is ignored and the
FB comparator switches over to a fixed 500mV threshold.
The switching frequency is changed to the programmed
value by scaling the on time as needed.
Power Save Mode Programming
The SC493 provides selectable power-save operation at
light loads. When register bits PSV1,0 are set to 01 or 10
the power save mode is enabled. With power save
enabled, the zero crossing comparator monitors the
inductor current via the voltage across the low-side
MOSFET. If the inductor current falls to zero for 8 consecu-
tive cycles then the controller enters power save and turns
off the low-side FET on each subsequent cycle as long as
the current crosses zero. If the inductor current does not
reach zero for 8 consecutive switching cycles the control-
ler immediately exits power save. The controller counts
zero crossings and therefore the converter can sink current
as long as the current does not cross zero on 8 consecu-
tive consecutive cycles. This allows the output voltage to
recover quickly in response to negative load steps.
The SC493 can also be operated in forced Continuous
Conduction Mode (CCM) by setting PSV1,0 = 00 or 11.
With these settings the device will not enter PSAVE and
operates at programmed frequency even at light loads.
This feature provides user flexibility for system design.
Figure 1 shows operation under power save and continu-
ous conduction mode at light loads.
During soft-start the output voltage tracks the internal
ramp, which limits the start-up inrush current and provides
a controlled soft-start profile for a wide range of applica-
tions. Soft-start programmability is achieved by changing
the frequency of the oscillator. The soft-start ramp reaches
500mV in 90% of the programmed soft-start time. The
remaining 10% of the programmed soft-start time is used
to allow the system to stabilize before enabling the PGOOD
comparator to drive the PGOOD pin high.
During soft-start the controller turns off the low-side
MOSFET on any cycle if the inductor current falls to zero.
FB Ripple
Voltage
(V FB )
Inductor
Current
DH
Dead time varies
according to load
FB threshold
(500mV)
Zero (0A)
On-time (T ON )
DH On-time is triggered when
V FB reaches the FB Threshold.
This prevents negative inductor current, allowing the
device to start into a pre-biased output.
Frequency Programming
The nominal switching frequency in continuous
conduction mode is programmable via the I 2 C interface.
DL
DL drives high when on-time is completed.
DL remains high until inductor current reaches zero.
Figure 1 — Power-save Operation
14
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