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参数资料
| 型号： | SC668ULTRT |
| 厂商： | Semtech |
| 文件页数： | 42/46页 |
| 文件大小： | 0K |
| 描述： | IC LED DRVR LMU 8CH MLPQUT20 |
| 特色产品： | Semtech sc667 and sc668 |
| 标准包装： | 1 |
| 拓扑： | 线性（LDO），PWM |
| 输出数： | 12 |
| 内部驱动器： | 是 |
| 类型 - 主要： | 背光，LED 闪烁器，照明管理装置（LMU） |
| 频率： | 400kHz |
| 电源电压： | 2.9 V ~ 5.5 V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-UFQFN 裸露焊盘 |
| 供应商设备封装： | 20-MLPQ（3x3） |
| 包装： | 标准包装 |
| 工作温度： | -40°C ~ 85°C |
| 其它名称： | SC668ULDKR |
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SC668
Register Map (continued)
To prevent drop-out, the maximum LDO4 output setting
should be limited to:
V LDO4(MAX) = V IN(MIN) - [1.33 × I LDO4(MAX) ],
where V IN(MIN) is the minimum battery voltage and I LDO4(MAX)
is the maximum load current of LDO4. LDO4 load current
includes current to the external photo-detection circuit.
AD_O7 through AD_O0 [D7:D0]
These are the 8 bits of AD OUT . AD_O7 [D7] is the Most
Significant Bit (MSB), and AD_O0 [D0] is the Least
Significant Bit (LSB). Binary weights of these bits are
shown in Table 24.
ADC Falling Threshold (15h)
This register contains the value AD FALL . When AD OUT falls
below AD FALL and AD_AUTO = 1, backlight bank #1 changes
to the starting value in the bank #1 register (02h).
AD_F7 through AD_F0 [D7:D0]
These are the 8 bits of AD FALL . AD_F7 is the MSB, and AD_F0
is the LSB.
ADP and OLE Functions (16h)
ADP (Automatic Drop-out Protection) and OLE (Other
Lighting Effects) are controlled with this register. ADP
applies to bank #1 only.
Name
Table 24 — AD OUT Bits [D7:D0]
Bit Binary Weight
ADP ensures current matching in the LEDs by responding
to a low battery voltage. ADP limits the maximum back-
light current to a level which ensures that backlight LEDs
AD_O7
AD_O6
AD_O5
AD_O4
AD_O3
AD_O2
AD_O1
AD_O0
D7
D6
D5
D4
D3
D2
D1
D0
1/2
1/4
1/8
1/16
1/32
1/64
1/128
1/256
maintain matched currents. The ADP feature also prevents
the ripple on a low battery from inducing flicker in the
LEDs. As the battery voltage gradually proceeds lower,
ADP gradually dims the backlights. The normal backlight
brightness is restored after the battery is recharged by
writing a logic zero to the ADP_EN bit.
Bank #1 will try to resume the original backlight current
setting whenever ADP_EN = 0. Also, if any bank #1 current
sink is floating, the ADP_EN bit is cleared automatically.
To calculate the voltage at the ADC input, the weights of
only the bits set to one are summed together and multi-
plied by the voltage provided by LDO4. The result is equal
to the analog voltage applied to the ADI pin. For example,
if the value of register 13h reads AD OUT = 01111111,
and V LDO4 = 2.8V, the ADC input is at:
2.8 x (4 -1 + 8 -1 + 16 -1 + 32 -1 + 64 -1 + 128 -1 + 256 -1 ) = 1.38V.
ADC Rising Threshold (14h)
This register contains the value AD RISE . When AD OUT rises
above AD RISE and AD_AUTO = 1, backlight bank #1 changes
to the target value in the bank #1 target register (06h).
Any write operations to change the following bit combi-
nations in register 01h will also cause bank #1 to resume
the original setting:
? DIS = 1, EN = 0, BANK1EN = 1
? DIS = 0, EN = 1, BANK1EN = 1
? DIS = 1, EN = 1, BANK1EN = 1
ADP_ACT Bit D6
This bit is a flag. A logic one indicates that ADP has been
activated. Once activated, the ADP is limiting the backlight
current. This flag bit is reset when ADP_EN = 0, or when
any bank#1 current sink is floating, or by writing any of
the following bit combinations in register 01h:
AD_R7 through AD_R0 [D7:D0]
These are the 8 bits of AD RISE . AD_R7 is the MSB, and AD_R0
is the LSB.
?
?
?
DIS = 1, EN = 0, BANK1EN = 1
DIS = 0, EN = 1, BANK1EN = 1
DIS = 1, EN = 1, BANK1EN = 1
42
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