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参数资料
| 型号： | SERCON410B |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 1 CHANNEL(S), 4M bps, SERIAL COMM CONTROLLER, PQFP100 |
| 封装： | PLASTIC, QFP-100 |
| 文件页数： | 17/34页 |
| 文件大小： | 682K |
| 代理商： | SERCON410B |
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CONTROL REGISTER ADDRESSES (Continued)
A6-1
Bit
Name
R/W
Value
Function
6H
0-15
EN0_INT_n
R/W
0
1
Interrupt flag does not activate INT0
Interrupt flag activates INT0
Bit assignment same as for address 4H
7H
0-15
EN0_INT_n
R/W
0
1
Interrupt flag does not activate INT0
Interrupt flag activates INT0
Bit assignment same as for address 5H
8H
0-15
EN1_INT_n
R/W
0
1
Interrupt flag does not activate INT1
Interrupt flag activates INT1
Bit assignment same as for address 4H
9H
0-15
EN1_INT_n
R/W
0
1
Interrupt flag does not activate INT1
Interrupt flag activates INT1
Bit assignment same as for address 5H
OAH
0-7
PHAS0
R/W
Phase for MST transmit (master) or MST
receive (slave) (reset value = 0FFH)
8-15
PHAS1
R/W
Phase for MST receive (slave)
(reset value = 0FFH)
OBH
0-7
PHASREC
R
Phase information of received MST
8-15
RECADR
R
Address of receive telegram
0CH
0
MSTEN
R/W
0
1
MST is not transmitted or received
MST is transmitted or received (SERCOS
interface mode)
1
MSTMASTER
R/W
0
1
Receive MST (SERCOS interface slave)
Transmit and receive MST (SERCOS
interface master)
2
COMBLK0
R/W
0
1
When phase = PHAS0 transmission block 0
is processed
When phase = PHAS0 transmission block 1
is processed
3
COMBLK1
R/W
0
1
When phase = PHAS1 transmission block 0
is processed
When phase = PHAS1 transmission block 1
is processed
4
CON_CLK
R
Level at CON_CLK pin
5
ENCONCLK
R/W
0
1
CON_CLK pin doesn’t become active
CON_CLK pin becomes active from TINT0 to
TINT1
6
POLCONCLK
R/W
0
1
Signal at CON_CLK is 1-active
Signal at CON_CLK is 0-active
7
CYC_CLK
R
Level at CYC_CLK pin
8
ENCYCCLK
R/W
0
1
CYC_CLK pin does not trigger timing control
CYC_CLK pin triggers timing control after
TCYCSTART
SERCON410B
20/30
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