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参数资料
| 型号： | SERCON410B |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 1 CHANNEL(S), 4M bps, SERIAL COMM CONTROLLER, PQFP100 |
| 封装： | PLASTIC, QFP-100 |
| 文件页数： | 3/34页 |
| 文件大小： | 682K |
| 代理商： | SERCON410B |
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PIN DESCRIPTION (Continued)
Signal (s)
Pin (s)
IO
Function
BYTEDIR
100
I
Byte address sequence: when BYTEDIR is 0, A0 = 0 addresses the lower
8 bits of a word (low byte first), when BYTEDIR is 1, the upper 8 bits of a
word are addressed (high byte first).
INT0, INT1
44,43
O
Interrupts, active low or active high. Interrupt sources and signal polarity
are programmable.
SREGEN
28
I
Internal regeneration. When SREGEN is 0, clock and data regeneration
are turned off. RxC and TxC are clock inputs. When SREGEN is 1, clock
and data regeneration are turned on. RxC and TxC output the internally
generated clocks.
SBAUD
29
I
Baud rate. When regeneration is turned on, SBAUD selects the baud rate
(fSCLK/16 when SBAUD is 0, fSCLK/32 when SBAUD is 1). Can be
overwritten by the microprocessor.
RxD
14
I
Receive data for the serial interface.
RxC
12
I/O
Receive clock for the serial interface. When regeneration is turned off
(SREGEN = 0), clock input for the serial receiver and transmitter (only
when repeater is turned on); when regeneration is turned on (SREGEN = 1)
output of the internally generated receive clock. The maximum frequency
is 10 MHz.
RECACTN
26
O
Receive active, active low. Indicates that the serial receiver is receiving a
telegram.
TxD1
16
O
Transmit data. The pin can be switched to a high impedance state.
TxD6-2
22,21,2
0,
18,17
O
Transmit data or output port. The pins either output the serial data or can
be used as parallel output ports. When they output transmit data, each pin
can be switched to a high impedance state individually.
TxDNRZ
24
O
NRZ-coded transmit data.
TxC
13
I/O
Transmit clock for the serial interface. When regeneration is turned off
(SREGEN = 0) and the repeater is turned off, it is the clock input for the
serial transmitter; when regeneration is turned on (SREGEN = 1) it is the
output for the internally generated transmit clock. The maximum frequency
is 10 MHz.
IDLE
25
O
Transmitter active, active low. When transmitting own data IDLE is 0.
TM0, TM1
30,31
I
Turn on test generator: TM0 = 0 switches TxD1-6 to continuous signal light,
TM1 = 0 switch-over to zero bit stream. The processor can overwrite the
level of TM1-0.
L_ERRN
32
O
Line error, active low: goes low when signal distortion is too high or when
the receive signal is missing. The operating mode is programmed by the
processor.
CYC_CLK
34
I
SERCOS interface cycle clock: CYC_CLK synchronizes the
communication cycles. The polarity is programmable.
CON_CLK
35
O
Control clock: becomes active within a communication cycle. Time,
polarity and width are programmable.
DIV_CLK
36
O
Divided control clock: becomes active several times within a ommunication
cycle. Number of pulses, start time, repetition rate and polarity are
programmable, the pulse width is 1
s.
SCLK
2
I
Serial clock for clock regeneration: the frequency is 16 or 32 times the
baud rate, the maximum frequency is 64 MHz.
Table 1. SERCON410B I/O Port Function Summary (Continued)
SERCON410B
7/30
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