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参数资料
| 型号： | SERCON410B |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 1 CHANNEL(S), 4M bps, SERIAL COMM CONTROLLER, PQFP100 |
| 封装： | PLASTIC, QFP-100 |
| 文件页数： | 20/34页 |
| 文件大小： | 682K |
| 代理商： | SERCON410B |
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4.2 DATA STRUCTURES WITHIN THE RAM
In this RAM the first eleven words have a fixed meaning.
A10-1
Contents
0-1
COMPT0-1: Start of transmission blocks 0-1
2-9
SCPT0-7: Address service containers 0-7
10
NMSTERR: Error counter MST
4.2.1 Telegram Headers
A telegram header for receive telegram contains thefollowing five control words:
INDEX
Bit
Name
Function
0
0-7
ADR
Telegram address
8
DMA
Data storage in the internal RAM (DMA = 0) or DMA transfer
(DMA = 1)
9
DBUF
Data in the RAM: single buffer (DBUF = 0) or double buffer (DBUF
= 1)
10
VAL
For single buffering (DMA = 0, DBUF = 0) or DMA transfer (DMA = 1):
telegram data is invalid (VAL = 0) or valid (VAL = 1); for double
buffering (DMA = 0, DBUF = 1): data in buffer 0 (VAL = 0) or buffer
1 (VAL = 1) is valid. Modified by controller at beginning and end of
receive telegrams.
11
ACHK
Telegrams are received if the address is valid (ACHK = 1) or
independent on the received address (ACHK = 0). The received
address is stored at ADR.
12
TCHK
The time of receiving is checked (TCHK = 1) or not checked
(TCHK = 0).
13
RERR
The last telegram was free of error (RERR = 0) or errored or not
received (RERR = 1).
14
0
Marker bit for telegram header of receive telegram.
15
0
Marker bit for telegram header.
1
0-15
TRT
Time for the start of telegram in
s after end of MST.
2
0-15
TLEN
Length of telegram in data words (not including address).
3
0-9
PT
Word address within the RAM of the next telegram header or the
end marker.
10-15
(Not used)
4
0-15
NERR
Error counter
The rest of the RAM can be divided into data structures as required.
SERCON410B
23/30
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