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参数资料
| 型号： | SFCF64GBH2BU4TO-I-NU-517-STD |
| 厂商： | Swissbit NA Inc |
| 文件页数： | 15/102页 |
| 文件大小： | 0K |
| 描述： | FLASH SLC UDMA/MDMA/PIO 64GB |
| 标准包装： | 1 |
| 系列： | C-440 |
| 存储容量： | 64GB |
| 存储器类型： | CompactFlash? |
| 其它名称： | 1052-1090 |
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Signal Name
Dir.
Pin
Description
In Memory Mode, this signal is set high when the CompactFlash TM Storage Card
is ready to accept a new data transfer operation and is held low when the card
is busy.
READY
(PC Card Memory Mode)
At power up and at Reset, the READY signal is held low (busy) until the
CompactFlash TM Storage Card has completed its power up or reset function. No
access of any type should be made to the CompactFlash TM Storage Card during
this time.
– IREQ
(PC Card I/O Mode)
INTRQ
(True IDE Mode)
– REG
(PC Card Memory Mode)
– REG
(PC Card I/O Mode)
– DMACK
(True IDE Mode)
RESET
(PC Card Memory Mode)
RESET
(PC Card I/O Mode)
– RESET
(True IDE Mode)
Vcc
(PC Card Memory Mode)
Vcc
(PC Card I/O Mode)
Vcc
(True IDE Mode)
– VS1, – VS2
(PC Card Memory Mode)
O
I
I
37
44
41
13, 38
Note, however, that when a card is powered up and used with RESET
continuously disconnected or asserted, the Reset function of the RESET pin is
disabled. Consequently, the continuous assertion of RESET from the application
of power shall not cause the READY signal to remain continuously in the busy
state.
I/O Operation – After the CompactFlash TM Storage Card has been configured for
I/O operation, this signal is used as -Interrupt Request. This line is strobed low
to generate a pulse mode interrupt or held low for a level mode interrupt.
In True IDE Mode signal is the active high Interrupt Request to the host.
This signal is used during Memory Cycles to distinguish between Common
Memory and Register (Attribute) Memory accesses. High for Common Memory,
Low for Attribute Memory.
The signal shall also be active (low) during I/O Cycles when the
I/O address is on the Bus.
This is a DMA Acknowledge signal that is asserted by the host in response to
DMARQ to initiate DMA transfers.
The – DMACK signal must be high except during the execution of DMA
commands. (1)
If DMA operation is not supported by a True IDE Mode only host, this signal
should be driven high or connected to VCC by the host.
A host that does not support DMA mode and implements both
PC card and True-IDE modes of operation need not alter the
PC card mode connections while in True-IDE mode as long as this does not
prevent proper operation all modes.
The CompactFlash TM Storage Card is Reset when the RESET pin is high with the
following important exception:
The host may leave the RESET pin open or keep it continually high from the
application of power without causing a continuous Reset of the card. Under
either of these conditions, the card shall emerge from power-up having
completed an initial Reset.
The CompactFlash TM Card is also Reset when the Soft Reset bit in the Card
Configuration Option Register is set.
This signal is the same as the PC Card Memory Mode signal.
In the True IDE Mode, this input pin is the active low hardware reset from the
host.
+5V, +3.3V power.
Same for all modes.
Same for all modes.
Voltage Sense Signals. – VS1 is grounded on the Card and sensed by the Host so
that the CompactFlash TM Storage Card CIS can be read at 3.3 volts and – VS2 is
reserved by PCMCIA for a secondary voltage and is not connected on the Card.
– VS1, – VS2
(PC Card I/O Mode)
– VS1, – VS2
(True IDE Mode)
– WAIT
(PC Card Memory Mode)
– WAIT
(PC Card I/O Mode)
IORDY
(True IDE Mode – Except
Ultra DMA Mode)
O
O
33, 40
42
This signal is the same for all modes.
This signal is the same for all modes.
The – WAIT signal is driven low by the CompactFlash TM Storage
Card to signal the host to delay completion of a memory or I/O cycle that is in
progress.
This signal is the same as the PC Card Memory Mode signal.
In True IDE Mode, except in Ultra DMA modes, this output signal may be used as
IORDY.
Swissbit AG
Industriestrasse 4
Swissbit reserves the right to change products or specifications without notice.
Revision: 1.00
CH-9552 Bronschhofen
Switzerland
www.swissbit.com
industrial@swissbit.com
C-440_data_sheet_CF-HxBU_Rev100.doc
Page 15 of 102
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