参数资料
型号: SI3216M-GT
厂商: Silicon Laboratories Inc
文件页数: 58/122页
文件大小: 0K
描述: IC SLIC/CODEC 1CH 38TSSOP
标准包装: 50
系列: ProSLIC®
功能: 用户线路接口概念(SLIC),CODEC
接口: GCI,PCM,SPI
电路数: 1
电源电压: 3.13 V ~ 5.25 V
电流 - 电源: 88mA
功率(瓦特): 700mW
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 38-TFSOP(0.173",4.40mm 宽)
供应商设备封装: 38-TSSOP
包装: 管件
包括: 音频音调生成,BORSCHT 功能,FSK 生成,振铃和电池电压生成
Si3216
40
Rev. 1.0
Not
Recommended
fo
r N
ew
D
esi
gn
2.4.2. Sinusoidal Ringing
To configure the ProSLIC for sinusoidal ringing, the
frequency and amplitude are initialized by writing to the
following indirect registers: RCO, RNGX, and RNGY.
The equations for RCO, RNGX, RNGY are as follows:
where
and f = desired ringing frequency in hertz.
In selecting a ringing amplitude, the peak TIP-to-RING
ringing voltage must be greater than the selected on-
hook line voltage setting (VOC, direct Register 72). For
example, to generate a 70 VPK 20 Hz ringing signal, the
equations are as follows:
In addition, the user must select the sinusoidal ringing
waveform by writing TSWS = 0 (direct Register 34,
bit 0).
2.4.3. Trapezoidal Ringing
In addition to the sinusoidal ringing waveform, the
ProSLIC
supports
trapezoidal
ringing.
illustrates a trapezoidal ringing waveform with offset
VROFF.
Table 29. Registers for Ringing Generation
Parameter
Range/ Description
Register
Bits
Location
Ringing Waveform
Sine/Trapezoid
TSWS
Ringing Voltage Offset Enable
Enabled/
Disabled
RVO
Ringing Active Timer Enable
Enabled/
Disabled
RTAE
Ringing Inactive Timer Enable
Enabled/
Disabled
RTIE
Ringing Oscillator Enable
Enabled/
Disabled
ROE
Ringing Oscillator Active Timer
0 to 8 s
RAT[15:0]
Direct Registers 48 and
Ringing Oscillator Inactive Timer
0 to 8 s
RIT[15:0]
Direct Registers 50 and
Linefeed Control (Initiates Ringing State)
Ringing State = 100b
LF[2:0]
High Battery Voltage
0 to –94.5 V
VBATH[5:0]
Ringing dc voltage offset
0 to 94.5 V
ROFF[15:0]
Indirect Register 6
Ringing frequency
15 to 100 Hz
RCO[15:0]
Indirect Register 7
Ringing amplitude
0 to 94.5 V
RNGX[15:0]
Indirect Register 8
Ringing initial phase
Sets initial phase for
sinewave and period
for trapezoid
RNGY[15:0]
Indirect Register 9
Common Mode Bias Adjust During Ringing
0 to 22.5 V
VCMR[3:0]
Indirect Register 27
Note: The ProSLIC uses registers that are both directly and indirectly mapped. A “direct” register is one that is mapped
directly. An “indirect” register is one that is accessed using the indirect access registers (direct registers 28 through
31).
RCO
coeff
2
15
=
coeff
2
f
1000 Hz
-----------------------
cos
=
RNGX
1
4
---
1
coeff
1coeff
+
------------------------
2
15
Desired V
PK 0to 94.5 V
96 V
------------------------------------------------------------------------
=
RNGY
0
=
coeff
2
20
1000 Hz
-----------------------
0.99211
=
cos
=
RCO
0.99211
2
15
32509
7EFDh
==
=
RNGX
1
4
---
0.00789
1.99211
---------------------
2
15
70
96
------
376
0177h
=
=
RNGY
0
=
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