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| 型号： | SI3216M-GT |
| 厂商： | Silicon Laboratories Inc |
| 文件页数： | 59/122页 |
| 文件大小： | 0K |
| 描述： | IC SLIC/CODEC 1CH 38TSSOP |
| 标准包装： | 50 |
| 系列： | ProSLIC® |
| 功能： | 用户线路接口概念（SLIC），CODEC |
| 接口： | GCI，PCM，SPI |
| 电路数： | 1 |
| 电源电压： | 3.13 V ~ 5.25 V |
| 电流 - 电源： | 88mA |
| 功率（瓦特）： | 700mW |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 38-TFSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 38-TSSOP |
| 包装： | 管件 |
| 包括： | 音频音调生成，BORSCHT 功能，FSK 生成，振铃和电池电压生成 |
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Si3216
Rev. 1.0
41
Not
Recommended
fo
r N
ew
D
esi
gn
s
Figure 22. Trapezoidal Ringing Waveform
To configure the ProSLIC for trapezoidal ringing, the
user should follow the same basic procedure as in the
Sinusoidal Ringing section, but using the following
equations:
RCO is a value which is added or subtracted from the
waveform to ramp the signal up or down in a linear
fashion. This value is a function of rise time, period, and
amplitude, where rise time and period are related
through the following equation for the crest factor of a
trapezoidal waveform.
where T = ringing period, and CF = desired crest factor.
For example, to generate a 71 VPK, 20 Hz ringing
signal, the equations are as follows:
For a crest factor of 1.3 and a period of 0.05 s (20 Hz),
the rise time requirement is 0.0153 s.
In addition, the user must select the trapezoidal ringing
waveform by writing TSWS = 1 in direct Register 34.
2.4.4. Ringing DC Voltage Offset
A dc offset can be added to the ac ringing waveform by
defining the offset voltage in ROFF (indirect Register 6).
The offset, VROFF, is added to the ringing signal when
RVO is set to 1 (direct Register 34, bit 1). The value of
ROFF is calculated as follows:
2.4.5. Linefeed Considerations During Ringing
Care must be taken to keep the generated ringing signal
within the ringing voltage rails (GNDA and VBAT) to
maintains
proper
biasing
of
the
external
bipolar
transistors. If the ringing signal nears the rails, a
distorted ringing signal and excessive power dissipation
in the external transistors will result.
To prevent this invalid operation, set the VBATH value
(direct Register 74) to a value higher than the maximum
peak ringing voltage. The discussion below outlines the
considerations and equations that govern the selection
of the VBATH setting for a particular desired peak ringing
voltage.
First, the required amount of ringing overhead voltage,
VOVR, is calculated based on the maximum value of
current through the load, ILOAD,PK, the minimum current
gain of Q5 and Q6, and a reasonable voltage required
to keep Q5 and Q6 out of saturation. For ringing signals
up to VPK =87V, VOVR = 7.5 V is a safe value.
However, to determine VOVR for a specific case, use the
equations below.
where:
NREN is the ringing REN load (max value = 5),
IOS is the offset current flowing in the line driver circuit
(max value = 2 mA), and
VAC,PK = amplitude of the ac ringing waveform.
It is good practice to provide a buffer of a few more
milliamperes for ILOAD,PK to account for possible line
leakages, etc. The total ILOAD,PK current should be
smaller than 80 mA.
where
is the minimum expected current gain of
transistors Q5 and Q6.
The minimum value for VBATH is, therefore, given by the
following equation:
time
VROFF
T=1/freq
tRISE
VTIP-RING
RNGY
1
2
---
Period
8000
=
RNGX
Desired V
PK
96 V
-----------------------------------
2
15
=
RCO
2
RNGX
t
RISE
8000
---------------------------------
=
t
RISE
3
4
---T1
1
CF
2
-----------
–
=
RNGY 20 Hz
1
2
---
1
20 Hz
----------------
8000
200
C8h
=
RNGX 71 V
PK
71
96
------
2
15
24235
5EABh
=
RCO 20 Hz, 1.3 crest factor
2
24235
0.0153
8000
--------------------------------------
396
018Ch
=
ROFF
V
ROFF
96
------------------
2
15
=
I
LOAD,PK
V
AC,PK
R
LOAD
-------------------
I
OS
+
V
AC,PK
N
REN
6.9 k
------------------
I
OS
+
==
V
OVR
I
LOAD,PK
1
+
-------------
80.6
1V
+
=
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| SI3216M-KT | 功能描述:IC SLIC/CODEC 1CH 38TSSOP RoHS:否 类别:集成电路 (IC) >> 接口 - 电信 系列:ProSLIC® 产品培训模块:Lead (SnPb) Finish for COTS 产品变化通告:Product Discontinuation 06/Feb/2012 标准包装:750 系列:* |
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