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参数资料
| 型号： | SI3460-E03-GMR |
| 厂商： | Silicon Laboratories Inc |
| 文件页数： | 13/24页 |
| 文件大小： | 0K |
| 描述： | IC POWER MANAGEMENT CTLR 11VQFN |
| 标准包装： | 500 |
| 应用： | 供电设备（PSE） |
| 电流 - 电源： | 500mA |
| 电源电压： | 2.7 V ~ 3.6 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 10-VFDFN 裸露焊盘 |
| 供应商设备封装： | 11-QFN（3x3） |
| 包装： | 带卷 (TR) |
Si3460
4.3.4. DC-DC Converter Ramp-Up
After the optional classification sequence, the dc-dc converter is powered up to –50 V with a current limit
corresponding to the values indicated in Table 9. After powerup, power is applied to V OUT as long as there is not an
overcurrent fault, disconnect, or input undervoltage (UVLO) condition. The STATUS LED is continuously lit when
power is applied. If the output power exceeds the level determined by the initial voltage of the STATUS pin, the
Si3460 will declare an error and shut down the port, flashing the LED rapidly to indicate the error (for either two
seconds or until reset as determined by the initial voltage on the STATUS pin).
4.3.5. DC-DC Converter Soft Start
The PWM control loop of the dc-dc converter is designed to produce a gradual rise in output voltage to eliminate
any inrush current issues. The nominal set point of the dc-dc converter is –50 V. V OUT at –50 V results in 0.930 V
at the VSENSE pin. It is possible for there to be almost no load on the dc-dc converter; so, the duty cycle is ramped
slowly up to the dc set point. The duty cycle is initially set to zero (dc-dc converter off). Once the desired voltage set
point is reached, the feedback path from VSENSE is enabled, and the converter is allowed to regulate at the
desired set point.
4.3.6. Disconnect
The Si3460 implements a robust disconnect algorithm. If the output current level drops below 7.5 mA (nominal) for
more than 350 ms, the Si3460 will declare a PD disconnect, and the dc-dc converter clock (250 kHz) and FET M1
will be turned off. As set by the initial voltage on the STATUS pin, the Si3460 will then automatically resume the
detection process after 250 ms for "endpoint mode" and two seconds for "midspan mode." The difference in these
two backoff timings is specified by the IEE 802.3af standard for the midspan and endpoint operating modes.
4.3.7. Current Limit Control
The Si3460's overcurrent trip point is determined by the output power set during the classification stage power
granting process. If the output current exceeds the threshold, a timer counts up towards a time-out of 60 ms. If the
current drops below the set threshold, the timer counts down towards zero at 1/16th the rate. If the timer reaches
60 ms, an overcurrent fault is declared, and the channel is shut down by turning off the dc-dc converter clock and
then turning off the FET M1. After an overcurrent fault event, the LED will flash rapidly.
As set by the initial voltage on the STATUS pin at powerup, the Si3460 will then automatically resume the detection
process for "automatic restart configuration" unless the Si3460 is configured in a "restart after a RESET condition"
mode and a fault condition is detected; in that case, the LED will flash rapidly, and the detection process will
automatically start again after 2.2 seconds. Power will not be provided until an open-circuit condition is detected.
Once the Si3460-EVB detects an open-circuit condition (normally by removing the Ethernet cable from the Si3460-
EVB’s RJ-45 jack labelled “To PD”), the detection process begins, the status LED blinks at the rate of 3 times per
second, and the Si3460 is then allowed to go into classification and powerup mode if a valid PD signature
resistance is detected.
4.3.8. UVLO
The Si3460-EVB reference design is optimized for 12 to 15 V nominal input voltages (11 V min to 16 V maximum).
If the input voltage drops below 10 V in detection mode or if the output voltage drops below 10 V in classification or
powerup mode, a UVLO condition is declared, which generates the error condition (LED flashing rapidly). An
undervoltage event is a fault condition reported through the status LED as a rapid blinking of 10 flashes per
second. The UVLO condition is continuously monitored in all operating states.
4.3.9. Status LED Function
During the normal detection sequence, the STATUS LED flashes at approximately 3 times per second as the
detection process continues. After successful power up, the LED glows continuously. If there is an error condition
(i.e., class level is beyond programmed value, or a fault or over current condition has been detected), the LED
flashes rapidly at 10 times per second). This occurs for two seconds for normal error delay and, in the case of the
"restart after a RESET condition", the LED will flash rapidly, and the detection process will automatically start again
after 2.2 s and power will not be provided until an open circuit condition is detected. Once the Si3460-EVB detects
an open circuit condition, the LED blinks at 3 times per second.
If the Powered Device (PD) is disconnected so that a disconnect event occurs, the LED will start flashing at 3 times
per second once the detect process resumes.
Rev. 1.2
13
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相关代理商/技术参数 |
参数描述 |
|---|---|
| Si3460-EVB | 功能描述:电源管理IC开发工具 Si3460 PSE Eval Brd and Ref Design Kit RoHS:否 制造商:Maxim Integrated 产品:Evaluation Kits 类型:Battery Management 工具用于评估:MAX17710GB 输入电压: 输出电压:1.8 V |
| SI3460-XYY-GM | 制造商:SILABS 制造商全称:SILABS 功能描述:IEEE 802.3af PSE INTERFACE AND DC-DC CONTROLLER |
| SI3461 | 制造商:SILABS 制造商全称:SILABS 功能描述:SINGLE-PORT IEEE 802.3AT POE/POE+ PSE INTERFACE |
| Si3461-E01-GM | 功能描述:电源开关 IC - POE / LAN Single-Port PoE / PoE+ PSE interface RoHS:否 制造商:Fairchild Semiconductor 开关数量:Single 开关配置:SPST 开启电阻（最大值）:7.3 Ohms 串话: 带宽: 开启时间（最大值）:13 ns 关闭时间（最大值）:20 ns 切换电压（最大）: 工作电源电压:8 V to 26 V 最大工作温度:+ 125 C 安装风格:Through Hole 封装 / 箱体:TO-220F-6 |
| SI3461-E01-GMR | 功能描述:IC POWER MANAGEMENT CTLR 11VQFN RoHS:是 类别:集成电路 (IC) >> PMIC - 电源管理 - 专用 系列:- 应用说明:Ultrasound Imaging Systems Application Note 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:37 系列:- 应用:医疗用超声波成像，声纳 电流 - 电源:- 电源电压:2.37 V ~ 6 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:56-WFQFN 裸露焊盘 供应商设备封装:56-TQFN-EP（8x8） 包装:管件 |
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