参数资料
型号: SI4322-A0-FT
厂商: Silicon Laboratories Inc
文件页数: 19/22页
文件大小: 0K
描述: IC RX FSK UNI 868/915MHZ 16TSSOP
标准包装: 96
频率: 868MHz,915MHz
灵敏度: -104dBm
数据传输率 - 最大: 256 kbps
调制或协议: FSK
应用: 遥控,RKE,安全系统
电流 - 接收: 14mA
数据接口: PCB,表面贴装
天线连接器: PCB,表面贴装
特点: 配有 RSSI
电源电压: 2.2 V ~ 3.8 V
封装/外壳: 16-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 16-TSSOP
包装: 管件
Si4322
RX-TX ALIGNMENT PROCEDURES
RX-TX frequency offset can be caused only by the differences in the actual reference frequency. To minimize these errors it is suggested
to use the same crystal type and the same PCB layout for the crystal placement on the RX and TX PCBs.
To verify the possible RX-TX offset it is suggested to measure the CLK output of both chips with a high level of accuracy. Do not
measure the output at the XTL pin since the measurement process itself will change the reference frequency. Since the carrier
frequencies are derived from the reference frequency, having identical reference frequencies and nominal frequency settings at the
TX and RX side there should be no offset if the CLK signals have identical frequencies.
It is possible to monitor the actual RX-TX offset using the AFC status report included in the status byte of the receiver. By reading out
the status byte from the receiver the actual measured offset frequency will be reported. In order to get accurate values the AFC has
to be disabled during the read by clearing the "en" bit in the AFC Control Command (bit 0).
CRYSTAL SELECTION GUIDELINES
The crystal oscillator of the Si4322 requires a 10 MHz parallel mode crystal. The circuit contains an integrated load capacitor in order
to minimize the external component count. The internal load capacitance value is programmable from 8.5 pF to 16 pF in 0.5 pF steps.
With appropriate PCB layout, the total load capacitance value can be 10 pF to 20 pF so a variety of crystal types can be used.
When the total load capacitance is not more than 20 pF and a worst case 7 pF shunt capacitance (C 0 ) value is expected for the
crystal, the oscillator is able to start up with any crystal having less than 300 ohms ESR (equivalent series loss resistance). However,
lower C 0 and ESR values guarantee faster oscillator startup.
The crystal frequency is used as the reference of the PLL, which generates the local oscillator frequency (f LO ). Therefore f LO is directly
proportional to the crystal frequency. The accuracy requirements for production tolerance, temperature drift and aging can thus be
determined from the maximum allowable local oscillator frequency error.
Whenever a low frequency error is essential for the application, it is possible to “pull” the crystal to the accurate frequency by
changing the load capacitor value. The widest pulling range can be achieved if the nominal required load capacitance of the crystal
is in the “midrange”, for example 16 pF. The “pull-ability” of the crystal is defined by its motional capacitance and C 0 .
The on chip AFC is capable to correct TX/RX carrier offsets as much as 80% of the deviation of the received FSK modulated signal.
Not e:
There may be other requirements for the TX carrier accuracy with regards to the requirements as defined by standards and/or
channel separations.
19
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