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| 型号： | SI7129DN-T1-GE3 |
| 厂商： | Vishay Siliconix |
| 文件页数： | 2/13页 |
| 文件大小： | 0K |
| 描述： | MOSFET P-CH D-S 30V 1212-8 |
| 标准包装： | 1 |
| 系列： | TrenchFET® |
| FET 型： | MOSFET P 通道，金属氧化物 |
| FET 特点： | 标准 |
| 漏极至源极电压(Vdss)： | 30V |
| 电流 - 连续漏极(Id) @ 25° C： | 35A |
| 开态Rds（最大）@ Id, Vgs @ 25° C： | 11.4 毫欧 @ 14.4A，10V |
| Id 时的 Vgs(th)（最大）： | 2.8V @ 250µA |
| 闸电荷(Qg) @ Vgs： | 71nC @ 10V |
| 输入电容 (Ciss) @ Vds： | 3345pF @ 15V |
| 功率 - 最大： | 52.1W |
| 安装类型： | 表面贴装 |
| 封装/外壳： | PowerPAK? 1212-8 |
| 供应商设备封装： | PowerPAK? 1212-8 |
| 包装： | 标准包装 |
| 其它名称： | SI7129DN-T1-GE3DKR |
New Product
Si7129DN
Vishay Siliconix
THERMAL RESISTANCE RATINGS
Parameter
Symbol
Typical
Maximum
Unit
Maximum Junction-to-Ambient a, b
Maximum Junction-to-Case (Drain)
t ≤ 10 s
Steady State
R thJA
R thJC
26
1.9
33
2.4
°C/W
Notes:
a. Surface mounted on 1" x 1" FR4 board.
b. Maximum under Steady State conditions is 81 °C/W.
SPECIFICATIONS (T J = 25 °C, unless otherwise noted)
Parameter
Symbol
Test Conditions
Min.
Typ.
Max.
Unit
Static
Drain-Source Breakdown Voltage
V DS Temperature Coefficient
V GS(th) Temperature Coefficient
V DS
Δ V DS /T J
Δ V GS(th) /T J
V GS = 0 V, I D = - 250 μA
I D = - 250 μA
- 30
- 20
5
V
mV/°C
Gate-Source Threshold Voltage
V GS(th)
V DS = V GS , I D = - 250 μA
- 1.5
- 2.8
V
Gate-Source Leakage
Zero Gate Voltage Drain Current
On-State Drain Current a
I GSS
I DSS
I D(on)
V DS = 0 V, V GS = ± 20 V
V DS = - 30 V, V GS = 0 V
V DS = - 30 V, V GS = 0 V, T J = 55 °C
V DS ≤ - 5 V, V GS = - 10 V
- 20
± 100
-1
- 10
nA
μA
A
Drain-Source On-State Resistance a
Forward Transconductance a
R DS(on)
g fs
V GS = - 10 V, I D = - 14.4 A
V GS = - 4.5 V, I D = - 11.5 A
V DS = - 15 V, I D = - 14.4 A
0.0095
0.0160
37
0.0114
0.0200
Ω
S
Dynamic b
Input Capacitance
C iss
2230
3345
Output Capacitance
C oss
V DS = - 15 V, V GS = 0 V, f = 1 MHz
385
578
pF
Reverse Transfer Capacitance
C rss
322
Total Gate Charge
Gate-Source Charge
Q g
Q gs
V DS = - 15 V, V GS = - 10 V, I D = - 14.4 A
V DS = - 15 V, V GS = - 4.5 V, I D = - 14.4 A
47.5
24.6
7.7
71
37
nC
Gate-Drain Charge
Q gd
12
Gate Resistance
R g
f = 1 MHz
0.4
1.8
3.6
Ω
Turn-On Delay Time
t d(on)
50
75
Rise Time
Turn-Off DelayTime
t r
t d(off)
V DD = - 15 V, R L = 1.5 Ω
I D ? - 10 A, V GEN = - 4.5 V, R g = 1 Ω
43
30
65
45
Fall Time
Turn-On Delay Time
t f
t d(on)
14
14
21
21
ns
Rise Time
Turn-Off DelayTime
Fall Time
t r
t d(off)
t f
V DD = - 15 V, R L = 1.5 Ω
I D ? - 10 A, V GEN = - 10 V, R g = 1 Ω
9
36
10
18
54
20
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
Pulse Diode Forward Current a
I S
I SM
T C = 25 °C
- 35 e
- 60
A
Body Diode Voltage
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
Reverse Recovery Fall Time
Reverse Recovery Rise Time
V SD
t rr
Q rr
t a
t b
I F = - 10 A
I F = - 10 A, dI/dt = 100 A/μs, T J = 25 °C
- 0.8
31
30
15
16
- 1.2
47
45
V
ns
nC
ns
Notes:
a. Pulse test; pulse width ≤ 300 μs, duty cycle ≤ 2 %.
b. Guaranteed by design, not subject to production testing.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
www.vishay.com
2
Document Number: 68966
S10-2023-Rev. B, 06-Sep-10
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