SiI 0680A Data Sheet Revision 1.31-1
33
Subject to change without notice
IDE1_DMARQ
1
I
IDE DMA request
IDE1_RST_N
1
I/O
IDE reset
Table 5-3: IDE Channel #1 Signals Group
FLASH Interface
Bits
Type
Description
IDE0_DD[07]
1
O
FLASH memory address bit 18
IDE0_DD[05]
1
O
FLASH memory address bit 17
IDE0_DD[08]
1
O
FLASH memory address bit 16
IDE0_DD[09]
1
O
FLASH memory address bit 15
IDE0_DD[04]
1
O
FLASH memory address bit 14
IDE0_DD[03]
1
O
FLASH memory address bit 13
IDE0_DD[10]
1
O
FLASH memory address bit 12
IDE0_DD[00]
1
O
FLASH memory address bit 11
IDE0_DA2
1
O
FLASH memory address bit 10
IDE0_DD[01]
1
O
FLASH memory address bit 09
IDE0_DD[02]
1
O
FLASH memory address bit 08
IDE0_DD[11]
1
O
FLASH memory address bit 07
IDE0_DD[12]
1
O
FLASH memory address bit 06
IDE0_DD[13]
1
O
FLASH memory address bit 05
IDE0_DD[14]
1
O
FLASH memory address bit 04
IDE0_DD[15]
1
O
FLASH memory address bit 03
IDE0_DA0
1
O
FLASH memory address bit 02
IDE0_CS0_N
1
O
FLASH memory address bit 01
IDE0_CS1_N
1
O
FLASH memory address bit 00
IDE1_DD[07]
1
I/O
FLASH memory data bit 07
IDE1_DD[06]
1
I/O
FLASH memory data bit 06
IDE1_DD[05]
1
I/O
FLASH memory data bit 05
IDE1_DD[04]
1
I/O
FLASH memory data bit 04
IDE1_DD[11]
1
I/O
FLASH memory data bit 03
IDE1_DD[10]
1
I/O
FLASH memory data bit 02
IDE1_DD[09]
1
I/O
FLASH memory data bit 01
IDE1_DD[08]
1
I/O
FLASH memory data bit 00
IDE0_DA1
1
O
FLASH memory read strobe
IDE0_DD[06]
1
O
FLASH memory write strobe
MEM_CS_N
1
O
FLASH memory chip select
Table 5-4: SiI 0680A FLASH Memory Signals Group – Shared Signals
EEPROM Interface
Bits
Type
Description
IDE1_CS1_N
1
O
EEPROM serial data
IDE1_CS0_N
1
O
EEPROM serial clock
Table 5-5: SiI 0680A EEPROM Memory Signals Group – Shared Signals
Test Mode Signals
Bits
Type
Description
SCAN_EN
1
I
ASIC internal scan mode enable
TEST_MODE
1
I
ASIC test mode enable