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参数资料
| 型号： | SL23EP08SC-2HT |
| 元件分类： | 时钟及定时 |
| 英文描述： | 23EP SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 |
| 封装： | 0.150 INCH, ROHS COMPLIANT,SOIC-16 |
| 文件页数： | 12/18页 |
| 文件大小： | 405K |
| 代理商： | SL23EP08SC-2HT |
Rev 2.0, May 28, 2008
Page 3 of 18
SL23EP08
General Description
The SL23EP08 is a low skew, low jitter Zero Delay
Buffer with very low operating current.
The product includes an on-chip high performance PLL
that locks into the input reference clock and produces
eight (8) output clock drivers tracking the input
reference clock for systems requiring clock distribution.
in addition to FBK pin used for internal PLL feedback,
there are two (2) banks with four (4) outputs in each
bank, bringing the number of total available output
clocks to eight (8).
Input and output Frequency Range
The input and output frequency range is the same for
SL23EP08-1 and -1H versions. For SL23EP08-2, -2H -
3, -4 and -5H versions, the output frequency is 1/2x,
1x, 2x, or 4x of the CLKIN as given in the “Available
SL23EP08 Configurations” Table 3. But, the frequency
range depends on VDD, drive levels and output load
(CL) as given in the “Electrical Specification” Tables.
If the input clock frequency is DC (from GND to VDD),
this is detected by an input frequency detection
circuitry and all eight (8) clock outputs are forced to Hi-
Z. The PLL is shutdown to save power. In this
shutdown state, the product draws less than 10 μA
supply current.
SpreadThru Feature
If a Spread Spectrum Clock (SSC) were to be used as
an input reference clock, the SL23EP08 is designed to
pass the modulated Spread Spectrum Clock (SSC)
signal from its reference input to the output clocks. The
same spread characteristics at the input are passed
through the PLL and drivers without any degradation in
spread percent (%), spread profile and modulation
frequency.
Select Input Control
The SL23EP08 provides two (2) input select control
pins called S1 and S2. This feature enables users to
selects various states of output clock banks-A and
bank-B, output source and PLL shutdown features as
shown in the Table 2.
The S1 (Pin-9) and S2 (Pin-8) inputs include 250 k
weak pull-down resistors to GND.
PLL Bypass Mode
If the S2=1 and S1=0, the on-chip PLL is shutdown and
bypassed, and all the eight (8) output clocks of bank A
and bank B are driven directly from the reference input
clock. In this operation mode SL23EP08 works like a
non-ZDB fanout buffer.
High and Low-Drive Product Options
The SL23EP08 is offered with high drive “-1H, -2H and -
5H” and standard drive “-1, -2, -3 and -4” options. These
drive options enable the users to control load levels,
frequency range and EMI control. Refer to the AC
electrical tables for the details.
SL23EP08-5H is offered only with high drive option.
SL23EP08-3 and -4 are offered only with standard drive
option.
Skew and Zero Delay
All outputs should drive the similar load to achieve
output-to-output skew and input-to-output delay
specifications given in the AC electrical tables. However,
zero-delay between input and outputs can be adjusted by
changing the loading of FBK pin relative to the banks A
and B clocks since FBK is the feedback to the PLL.
Power Supply Range (VDD)
The SL23EP08 is designed to operate with from 3.3V to
2.5V VDD power supply range. An internal on-chip
voltage regulator is used to provide PLL constant power
supply of 1.8V, leading to a consistent and stable PLL
electrical performance in terms of skew, jitter and power
dissipation. The SL23EP08 I/O is powered by using
VDD.
相关PDF资料 |
PDF描述 |
|---|---|
| SL23EP08ZC-1T | PLL BASED CLOCK DRIVER, PDSO16 |
| SL23EP08SI-2 | 23EP SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 |
| SL23EP08SC-4 | 23EP SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 |
| SL23EP08SC-2T | 23EP SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 |
| SL23EP08SI-1H | 23EP SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| SL23EP08SC-2T | 功能描述:时钟缓冲器 10-220MHz 8 Outputs ZDB 3.3-2.5V RoHS:否 制造商:Texas Instruments 输出端数量:5 最大输入频率:40 MHz 传播延迟（最大值）: 电源电压-最大:3.45 V 电源电压-最小:2.375 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LLP-24 封装:Reel |
| SL23EP08SC-3 | 功能描述:时钟缓冲器 10-220MHz 8 Outputs ZDB 3.3-2.5V RoHS:否 制造商:Texas Instruments 输出端数量:5 最大输入频率:40 MHz 传播延迟（最大值）: 电源电压-最大:3.45 V 电源电压-最小:2.375 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LLP-24 封装:Reel |
| SL23EP08SC-3T | 功能描述:时钟缓冲器 10-220MHz 8 Outputs ZDB 3.3-2.5V RoHS:否 制造商:Texas Instruments 输出端数量:5 最大输入频率:40 MHz 传播延迟（最大值）: 电源电压-最大:3.45 V 电源电压-最小:2.375 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LLP-24 封装:Reel |
| SL23EP08SC-4 | 功能描述:时钟缓冲器 10-220MHz 8 Outputs ZDB 3.3-2.5V RoHS:否 制造商:Texas Instruments 输出端数量:5 最大输入频率:40 MHz 传播延迟（最大值）: 电源电压-最大:3.45 V 电源电压-最小:2.375 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LLP-24 封装:Reel |
| SL23EP08SC-4H | 功能描述:时钟缓冲器 10-220MH 8 Outputs ZDB 3.3-2.5V RoHS:否 制造商:Texas Instruments 输出端数量:5 最大输入频率:40 MHz 传播延迟（最大值）: 电源电压-最大:3.45 V 电源电压-最小:2.375 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LLP-24 封装:Reel |
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