参数资料
型号: SL28504BZC
厂商: Silicon Laboratories Inc
文件页数: 25/31页
文件大小: 0K
描述: IC CLOCK GEN EAGLELAKE 64TSSOP
标准包装: 28
类型: 时钟/频率发生器
PLL:
主要目的: Intel CPU 服务器
输入: 晶体
输出: HCSL,LVCMOS
电路数: 1
比率 - 输入:输出: 1:13
差分 - 输入:输出: 无/是
频率 - 最大: 400MHz
电源电压: 3.135 V ~ 3.465 V
工作温度: 0°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 64-TFSOP (0.240",6.10mm 宽)
供应商设备封装: 64-TSSOP
包装: 管件
SL28504
...................... DOC #: SP-AP-0052 (Rev. AA) Page 31 of 31
The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice. Sil-
icon Laboratories assumes no responsibility for errors and omissions, and disclaims responsibility for any consequences resulting from the
use of information included herein. Additionally, Silicon Laboratories assumes no responsibility for the functioning of undescribed features or
parameters. Silicon Laboratories reserves the right to make changes without further notice. Silicon Laboratories makes no warranty, repre-
sentation or guarantee regarding the suitability of its products for any particular purpose, nor does Silicon Laboratories assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation conse-
quential or incidental damages. Silicon Laboratories products are not designed, intended, or authorized for use in applications intended to
support or sustain life, or for any other application in which the failure of the Silicon Laboratories product could create a situation where per-
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cation, Buyer shall indemnify and hold Silicon Laboratories harmless against all claims and damages.
Document History Page
Document Title: SL28504 Clock Generator for IntelEaglelake Chipset
REV.
ECR#
Issue Date
Orig. of
Change
Description of Change
1.0
10/5/07
BSHEN
Initial Release
1.1
10/19/07
BSHEN
Add SRC1 to pin 17/18. and tri-level trigger at 24.576M
1.2
01/21/08
BSHEN
1. Change Revision ID Byte7[7:4] to be 0001
2. Updated block diagram
3. Change Byte10[6:2] and Byte11[4] to be reserved
1.3
05/26/09
BSHEN
1. Update TSSOP64 package dimension to compliant to SLI-POD spec
1.4
06/24/09
BSHEN
1. Correct the pin out with CLK request pin
2. Correct the CLK request register
3. Remove QFN package,
AA
1576
04/28/10
BSHEN
1. Updated Industrial ordering information
2. Correct VDD_IO pin description
3. Updated document format for ISO compliance.
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SL28504BZC-1 功能描述:时钟发生器及支持产品 Syst Clock Intel Eaglake RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56
SL28504BZC-1T 功能描述:时钟发生器及支持产品 Syst Clock Intel Eaglake RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56
SL28504BZC-2 功能描述:时钟发生器及支持产品 Syst Clock Intel Eaglake RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56
SL28504BZC-2T 功能描述:时钟发生器及支持产品 Syst Clock Intel Eaglake RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56
SL28504BZCT 功能描述:时钟发生器及支持产品 Syst Clock Intel Eaglake RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56