参数资料
型号: SM3-19.44M
厂商: Connor-Winfield
文件页数: 9/36页
文件大小: 0K
描述: IC MOD TIMING 19.440MHZ STATUM 3
标准包装: 1
系列: SM3
类型: 定时模块,系统时钟
PLL:
主要目的: 以太网,ADM,DSLAM,SONET/SDH,Stratum,TDM
输入: LVCMOS
输出: LVCMOS
电路数: 1
比率 - 输入:输出: 4:3
差分 - 输入:输出: 无/无
频率 - 最大: 19.44MHz
电源电压: 3.135 V ~ 3.465 V
工作温度: 0°C ~ 70°C
安装类型: 通孔
封装/外壳: 32-DIP 模块
包装: 管件
其它名称: CW642
SM3 19.44M
SM319.44M
SM3 Data Sheet #:
TM052
Page 17 of 36 Rev: 06 Date: 01/26/11
Copyright 2011 The Connor-Winfield Corp. All Rights Reserved
Specifications subject to change without notice
FreeRun_Priority, 0x24 (R/W)
Bit 7 - Bit 5
Bit 4
Bit 3
Bit 2 - Bit 0
Enable/
Revertivity
Priority
Disable
1:Enable
0:Highest
Reserved
1:Enable
0:Disable
3:Lowest
0:Disable
Default:0
Default:0
Default:0
non-revertive
Free Run may be treated like a reference. When it is enabled, Free Run will be entered when all references of higher
priority are lost or masked. If or when a higher priority reference returns, it is switched to if Free Run is set as “re-
vertive”. When disabled, Free Run will be entered only if manually selected or all references fail without an available
Hold Over history. For equal priority value, Free Run will be treated as lower priority.
History_Policy, 0x25 (R/W)
Bit 7 - Bit 1
Bit 0
ReferenceSwitchHoldOver
HisoryPolicy
Reserved
0:Rebuild
1:Continue
Bit 0 determines if Hold Over is retained or rebuilt when a reference switch occurs. See
Application Notes, Holdover
History Accumulation and Management section.
History_Cmd, 0x26 (R/W)
Bit 7 - Bit 1
Bit 0
HoldOverHistroyCommands
01:Saveactivehistorytobackuphistory
Reserved
10:Restoreactivehistoryfrombackup
11:Flushtheactivehistoryandaccumulationregister
00:Nocommand
Bits 0-1 are written to save a holdover history to the backup history, restore the active holdover history from the
backup, or flush the active history. The default value of the register is 00. The last command is latched and
may be read by the application. A flush does not affect the backup history. See
Application Notes, Holdover
History Accumulation and Management section.
HoldOver_Time, 0x27 (R)
Bit 7 - Bit 0
IndicatesthetimesinceenteringtheHoldOverstate.from0-255,onebitperhour.Zeroinnon-HoldOverstateandstopsat255.
Cfgdata, 0x30 (R/W)
Bit 7 - Bit 0
Configurationdatawriteregister.
Configuration data is written to this register. Internal use only.
Cfgctr_Lo, 0x31 (R)
Bit 7 - Bit 0
Configurationdatawritecounterlowbyte.
Low order byte of configuration data write counter. Internal use only.
Register Descriptions and Operation continued
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