- 您现在的位置：买卖IC网 > PDF目录225195 > SM320C50HFGM66 (TEXAS INSTRUMENTS INC) 16-BIT, 66 MHz, OTHER DSP, CQFP132 PDF资料下载
参数资料
| 型号： | SM320C50HFGM66 |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 数字信号处理 |
| 英文描述： | 16-BIT, 66 MHz, OTHER DSP, CQFP132 |
| 封装： | TIE BAR, CERAMIC, QFP-132 |
| 文件页数： | 14/35页 |
| 文件大小： | 536K |
| 代理商： | SM320C50HFGM66 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页当前第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页
SMJ320C50/SMQ320C50
DIGITAL SIGNAL PROCESSOR
SGUS020 – JUNE 1996
21
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
EXTERNAL DMA TIMING
switching characteristics over recommended operating conditions [H = 0.5tc(CO)] (see Note 2)
PARAMETER
MIN
MAX
UNIT
td(HOL-HAL)
Delay time, HOLD low to HOLDA low
4H
ns
td(HOH-HAH)
Delay time, HOLD high before HOLDA high
2H
ns
tdis(AZ-HAL)
Disable time, address in the high-impedance state before HOLDA low§
H–15
ns
ten(HAH-Ad)
Enable time, HOLDA high to address driven
H–5
ns
td(XBL-IQL)
Delay time, XBR low to IAQ low
4H
6H
ns
td(XBH-IQH)
Delay time, XBR high to IAQ high
2H
4H
ns
td(XSL-RDV)
Delay time, read data valid after XSTRB low
40
ns
th(XSH-RD)
Hold time, read data after XSTRB high
0
ns
ten(IQL-RDd)
Enable time, IAQ low to read data driven
0
2H
ns
tdis(W)
Disable time, XR/W low to data in the high-impedance state
0
15
ns
tdis(I-D)
Disable time, IAQ high to data in the high-impedance state
H
ns
ten(D-XRH)
Enable time, data from XR/W going high
4
ns
Values derived from characterization data and are not tested.
HOLD is not acknowledged until current external access request is complete.
§ This parameter includes all memory control lines.
This parameter refers to the delay between the time the condition (IAQ = 0 and XR/W = 1) is satisfied and the time that the SMJ320C50x data
lines become valid.
NOTE 2: X preceding a name refers to the external drive of the signal.
timing requirements over recommended ranges of supply voltage and operating free-air
temperature
MIN
MAX
UNIT
td(HAL-XBL)
Delay time, HOLDA low to XBR low#
0#
ns
td(IQL-XSL)
Delay time, IAQ low to XSTRB low#
0#
ns
tsu(AV-XSL)
Setup time, Xaddress valid before XSTRB low
15
ns
tsu(DV-XSL)
Setup time, Xdata valid before XSTRB low
15
ns
th(XSL-D)
Hold time, Xdata hold after XSTRB low
15
ns
th(XSL-WA)
Hold time, write Xaddress hold after XSTRB low
15
ns
tw(XSL)
Pulse duration, XSTRB low
45
ns
tw(XSH)
Pulse duration, XSTRB high
45
ns
tsu(RW-XSL)
Setup time, R/W valid before XSTRB low
20
ns
th(XSH-RA)
Hold time, read Xaddress after XSTRB high
0
ns
# XBR, XR/W, and XSTRB lines should be pulled up with a 10-k
resistor to assure that they are in an inactive (high) state during the transition
period between the SMJ320C50x driving them and the external circuit driving them.
NOTE 2. X preceding a name refers to the external drive of the signal.
相关PDF资料 |
PDF描述 |
|---|---|
| SM5272B-2 | 3 RF DECODER |
| SM5272B-3 | 3 RF DECODER |
| SM5272B-4 | 3 RF DECODER |
| SM5272B-5 | 3 RF DECODER |
| SM5272B-6 | 3 RF DECODER |
相关代理商/技术参数 |
参数描述 |
|---|---|
| SM320C50PQI80EP | 功能描述:数字信号处理器和控制器 - DSP, DSC EP Digital Signal Proc RoHS:否 制造商:Microchip Technology 核心:dsPIC 数据总线宽度:16 bit 程序存储器大小:16 KB 数据 RAM 大小:2 KB 最大时钟频率:40 MHz 可编程输入/输出端数量:35 定时器数量:3 设备每秒兆指令数:50 MIPs 工作电源电压:3.3 V 最大工作温度:+ 85 C 封装 / 箱体:TQFP-44 安装风格:SMD/SMT |
| SM320C50PQM66EP | 功能描述:数字信号处理器和控制器 - DSP, DSC EP Digital Signal Proc RoHS:否 制造商:Microchip Technology 核心:dsPIC 数据总线宽度:16 bit 程序存储器大小:16 KB 数据 RAM 大小:2 KB 最大时钟频率:40 MHz 可编程输入/输出端数量:35 定时器数量:3 设备每秒兆指令数:50 MIPs 工作电源电压:3.3 V 最大工作温度:+ 85 C 封装 / 箱体:TQFP-44 安装风格:SMD/SMT |
| SM320C6000GDP167 | 制造商:TI 制造商全称:Texas Instruments 功能描述:FLOATING-POINT DIGITAL SIGNAL PROCESSOR |
| SM320C6000GDP200 | 制造商:TI 制造商全称:Texas Instruments 功能描述:FLOATING-POINT DIGITAL SIGNAL PROCESSOR |
| SM320C6000GDP225 | 制造商:TI 制造商全称:Texas Instruments 功能描述:FLOATING-POINT DIGITAL SIGNAL PROCESSOR |
发布紧急采购，3分钟左右您将得到回复。