- 您现在的位置：买卖IC网 > PDF目录225195 > SM320C50HFGM66 (TEXAS INSTRUMENTS INC) 16-BIT, 66 MHz, OTHER DSP, CQFP132 PDF资料下载
参数资料
| 型号： | SM320C50HFGM66 |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 数字信号处理 |
| 英文描述： | 16-BIT, 66 MHz, OTHER DSP, CQFP132 |
| 封装： | TIE BAR, CERAMIC, QFP-132 |
| 文件页数： | 8/35页 |
| 文件大小： | 536K |
| 代理商： | SM320C50HFGM66 |
第1页第2页第3页第4页第5页第6页第7页当前第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页
SMJ320C50/SMQ320C50
DIGITAL SIGNAL PROCESSOR
SGUS020 – JUNE 1996
16
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
MEMORY AND PARALLEL I/O INTERFACE WRITE
Memory and parallel I/O interface read timings are illustrated in Figure 7.
switching characteristics over recommended operating conditions [H = 0.5tc(CO)]
PARAMETER
MIN
MAX
UNIT
tsu(AV-WEL)
Setup time, address valid before WE low
H – 5
ns
th(WEH-AV)
Hold time, address valid after WE high
H – 10
ns
tw(WEL)
Pulse duration, WE low§
2H – 4
2H + 2
ns
tw(WEH)
Pulse duration, WE high§
2H – 2
ns
td(WEH-RDL)
Delay time, WE high to RD low
3H – 10
ns
tsu(WDV-WEH) Setup time, write data valid before WE high§
2H – 20
2H#
ns
th(WEH-WDV)
Hold time, write data valid after WE high§
H – 5
H+10
ns
ten(WE-BUd)
Enable time, WE to data bus driven
–5
ns
A15 – A0,PS, DS, IS, R/W, and BR timings are all included in timings referenced as address.
See Figure 8 for address bus timing variation with load capacitance.
§ STRB and WE edges are 0 – 4 ns from CLKOUT1 edges on writes. Rising and falling edges of these signals track each other; tolerance of resulting
pulse durations is
± 2 ns, not ± 4 ns.
Values derived from characterization data and are not tested.
# This value holds true for zero or one wait state only.
WE
RD
DATA
R/W
ADDRESS
tsu(AV-RDL)
th(WEH-WDV)
th(WEH-AV)
tw(WEL)
tsu(RD-RDH)
th(RDH-RD)
STRB
tsu(AV-WEL)
tsu(WDV-WEH)
tw(RDH)
ta(RDAV)
td(WEH-RDL)
tw(WEH)
tw(RDL)
td(RDH-WEL)
ta(RDL-RD)
th(RDH-AV)
ten(WE-BUd)
NOTE A: All timings are for 0 wait states. However, external writes always require two cycles to prevent external bus conflicts. The above diagram
illustrates a one-cycle read and a two-cycle write and is not drawn to scale. All external writes immediately preceded by an external
read or immediately followed by an external read require three machine cycles.
Figure 7. Memory and Parallel I/O Interface Read and Write Timing
相关PDF资料 |
PDF描述 |
|---|---|
| SM5272B-2 | 3 RF DECODER |
| SM5272B-3 | 3 RF DECODER |
| SM5272B-4 | 3 RF DECODER |
| SM5272B-5 | 3 RF DECODER |
| SM5272B-6 | 3 RF DECODER |
相关代理商/技术参数 |
参数描述 |
|---|---|
| SM320C50PQI80EP | 功能描述:数字信号处理器和控制器 - DSP, DSC EP Digital Signal Proc RoHS:否 制造商:Microchip Technology 核心:dsPIC 数据总线宽度:16 bit 程序存储器大小:16 KB 数据 RAM 大小:2 KB 最大时钟频率:40 MHz 可编程输入/输出端数量:35 定时器数量:3 设备每秒兆指令数:50 MIPs 工作电源电压:3.3 V 最大工作温度:+ 85 C 封装 / 箱体:TQFP-44 安装风格:SMD/SMT |
| SM320C50PQM66EP | 功能描述:数字信号处理器和控制器 - DSP, DSC EP Digital Signal Proc RoHS:否 制造商:Microchip Technology 核心:dsPIC 数据总线宽度:16 bit 程序存储器大小:16 KB 数据 RAM 大小:2 KB 最大时钟频率:40 MHz 可编程输入/输出端数量:35 定时器数量:3 设备每秒兆指令数:50 MIPs 工作电源电压:3.3 V 最大工作温度:+ 85 C 封装 / 箱体:TQFP-44 安装风格:SMD/SMT |
| SM320C6000GDP167 | 制造商:TI 制造商全称:Texas Instruments 功能描述:FLOATING-POINT DIGITAL SIGNAL PROCESSOR |
| SM320C6000GDP200 | 制造商:TI 制造商全称:Texas Instruments 功能描述:FLOATING-POINT DIGITAL SIGNAL PROCESSOR |
| SM320C6000GDP225 | 制造商:TI 制造商全称:Texas Instruments 功能描述:FLOATING-POINT DIGITAL SIGNAL PROCESSOR |
发布紧急采购，3分钟左右您将得到回复。