![](http://datasheet.mmic.net.cn/140000/SMJ320C26FJ_datasheet_5012288/SMJ320C26FJ_2.png)
SMJ320C26
DIGITAL SIGNAL PROCESSOR
SGUS 016A – AUGUST 1990 – REVISED AUGUST 2001
2
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
description
With a 100-ns instruction cycle time and an
innovative
memory
configuration,
the
SMJ320C26 performs operations necessary for
many real time digital signal processing algo-
rithms. Since most instructions require only one
cycle, the SMJ320C26 is capable of executing ten
million instructions per second. On-chip program-
mable data/program RAM of 1568 words of 16
bits, on-chip program ROM of 256-words, direct
addressing of up to 64K-words of external
program and 64K-words of data memory space,
and multiprocessor interface features for sharing
global memory minimize unnecessary data
transfers to take full advantage of the capabilities
of the processor.
The SMJ320C26 scaling shifter has a 16-bit input
connected to the data bus and a 32-bit output
connected to the ALU. The scaling shifter
produces a left shift of 0 to 16 bits on the input
data, as programmed in the instruction. The LSBs
of the output are filled with zeroes, and the MSBs
may be either filled with zeroes or sign-extended,
depending upon the status programmed into the
SXM (sign-extension mode) bit of status register
ST1.
PGA/LCCC/JLCC PIN ASSIGNMENTS
FUNCTION
PIN
FUNCTION
PIN
FUNCTION
PIN
FUNCTION
PIN
FUNCTION
PIN
FUNCTION
PIN
A0
K1/26
A12
K8/40
D2
E1/16
D14
A5/3
INT2
H1/22
VCC
H2/23
A1
K2/28
A13
L9/41
D3
D2/15
D15
B6/2
IS
J11/46
VCC
L6/35
A2
L3/29
A14
K9/42
D4
D1/14
DR
J1/24
MP/MC
A6/1
VSS
B1/10
A3
K3/30
A15
L10/43
D5
C2/13
DS
K10/45
MSC
C10/59
VSS
K11/44
A4
L4/31
BIO
B7/68
D6
C1/12
DX
E11/54
PS
J10/47
VSS
L2/27
A5
K4/32
BR
G11/50
D7
B2/11
FSR
J2/25
READY
B8/66
XF
D11/56
A6
L5/33
CLKOUT1
C11/58
D8
A2/9
FSX
F10/53
RS
A8/65
X1
G10/51
A7
K5/34
CLKOUT2
D10/57
D9
B3/8
HOLD
A7/67
R/W
H11/48
X2/CLKIN
F11/52
A8
K6/36
CLKR
B9/64
D10
A3/7
HOLDA
E10/55
STRB
H10/49
A9
L7/37
CLKX
A9/63
D11
B4/6
IACK
B11/60
SYNC
F2/19
A10
K7/38
D0
F1/18
D12
A4/5
INT0
G1/20
VCC
A10/61
A11
L8/39
D1
E2/17
D13
B5/4
INT1
G2/21
VCC
B10/62
D8
D13
D9
D10
D1
1
D12
D14
V
SS
A1
A2
A3
A4
A5
9 8 7 6 543
10
11
12
13
14
15
16
D15
RS
MP/MC
BIO
HOLD
READY
CLKR
CLKX
V
CC
V
CC
2 1 68 67 66 65 64 63 62 61
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
17
18
19
20
21
22
23
24
25
26
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
VSS
IACK
MSC
CLKOUT1
CLKOUT2
XF
HOLDA
DX
FSX
A8
A9
A10
A1
1
A12
A13
A14
A15
A6
A7
V
CC
X2/CLKIN
X1
BR
STRB
R/W
PS
IS
DS
VSS
D7
D6
D5
D4
D3
D2
D1
D0
SYNC
INT0
INT1
INT2
VCC
DR
FSR
A0
68-PIN FJ AND FD
LEADED AND LEADLESS
CERAMIC CHIP CARRIER PACKAGES
(TOP VIEW)
See Pin Assignments Table (Page 2) and Pin
Nomenclature Table (Page 3) for location and
description of all pins.