参数资料
型号: SMJL-29C80F/883
厂商: ATMEL CORP
元件分类: 数字信号处理外设
英文描述: 12-BIT, DSP-FAST COSINE TRANSFRM PROCESSOR, CQCC44
封装: MQFP-44
文件页数: 2/18页
文件大小: 287K
代理商: SMJL-29C80F/883
29C80F
Rev. D (25 Mar.97)
74
MATRA MHS
Signaling Flow
Block Period
The block period is the time needed to input or output the
64 data of one block (cf figure 9). The 29C80F has a block
period of 64 CLK cycles (1 cycle is defined by two
contiguous rising edges of CLK). This means that the
CLK period defines the FDCT/IDCT rate.
Latent Period
The latent period is the time between input data and its
corresponding output result (cf figure 13). The 29C80F
has a latent period of 128 CLK cycles (1 cycle is defined
by two contiguous rising edges of CLK) using or not the
internal zig-zag memory.
DCT Period
The DCT period is the time between the first input data
of a block and the last output data of the resulting block
(cf figure 9). The 29C80F has a DCT period of 192 CLK
cycles (1 latent period + 1 block period).
GAP Cycles
The gap cycles are the CLK cycles between the 64th data
of a block and the 1st data of the following block (cf
figure 11). These cycles can fit a block header or simply
an inactive period. The 29C80F authorizes 0, 8 or > 16
internal clock cycles as input gap cycles, else the
following computed block will be corrupted. Driving
/CLKEN can solve rapidly a possible application problem
due to the presence of 1 to 7 or 9 to 15 input gap cycles
(cf figure 10). The input gap cycles are fully retransmited
on the output bus one latent period later. During an
effective input gap cycle, the 29C80F does not pipeline
data, so the input data is lost.
Block Abortion
The data input phase for a block only can be aborted by
the BLKIN of a new block (cf figure 12). The aborttion
is authorized if 8 or > 16 data of the wanted aborted block
has been inputed before, else data output are corrupted.
In case of 8 (16) data, the new BLKIN is placed into the
cycle of the 8 (16)th data of the aborted block.
相关PDF资料
PDF描述
SMJL-29C80FSC 12-BIT, DSP-FAST COSINE TRANSFRM PROCESSOR, CQCC44
MPC107APX066L0 MULTIFUNCTION PERIPHERAL, PBGA503
MPC107ARX066L0 MULTIFUNCTION PERIPHERAL, CBGA503
MPC555LFMZP40R2 32-BIT, FLASH, 40 MHz, RISC MICROCONTROLLER, PBGA272
MPC555LFAZP40 32-BIT, FLASH, 40 MHz, RISC MICROCONTROLLER, PBGA272
相关代理商/技术参数
参数描述
SMJP-1V04W1P1 制造商:SEOUL 制造商全称:Seoul Semiconductor 功能描述:Acrich2 - 100V 4.3W MR Connect using a AIC directly to AC power
SMJP-1V04W1P1-XX 制造商:Seoul Semiconductor 功能描述:ACRICH2 - Bulk
SMJP-2V04W1P1 制造商:SEOUL 制造商全称:Seoul Semiconductor 功能描述:Acrich 2 - 120V 4.3W MR Connect using a AIC directly to AC power
SMJP-2V04W1P1-G 制造商:Seoul Semiconductor 功能描述:
SMJP-2V04W1P1-XX 制造商:Seoul Semiconductor 功能描述:ACRICH2 - Bulk