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SN54ABT18640, SN74ABT18640
SCAN TEST DEVICES
WITH 18-BIT INVERTING BUS TRANSCEIVERS
SCBS267C – FEBRUARY 1994 – REVISED JULY 1996
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D Members of the Texas Instruments
SCOPE
Family of Testability Products
D Members of the Texas Instruments
Widebus
Family
D Compatible With the IEEE Standard
1149.1-1990 (JTAG) Test Access Port and
Boundary-Scan Architecture
D SCOPE Instruction Set
– IEEE Standard 1149.1-1990 Required
Instructions and Optional CLAMP and
HIGHZ
– Parallel-Signature Analysis at Inputs
– Pseudo-Random Pattern Generation
From Outputs
– Sample Inputs/Toggle Outputs
– Binary Count From Outputs
– Device Identification
– Even-Parity Opcodes
D State-of-the-Art EPIC-ΙΙB BiCMOS Design
Significantly Reduces Power Dissipation
D Packaged in Plastic Shrink Small-Outline
(DL) and Thin Shrink Small-Outline (DGG)
Packages and 380-mil Fine-Pitch Ceramic
Flat (WD) Packages
description
The ’ABT18640 scan test devices with 18-bit
inverting bus transceivers are members of the
Texas
Instruments
SCOPE
testability
integrated-circuit family. This family of devices
supports IEEE Standard 1149.1-1990 boundary
scan to facilitate testing of complex circuit-board
assemblies. Scan access to the test circuitry is
accomplished via the 4-wire test access port
(TAP) interface.
In the normal mode, these devices are 18-bit inverting bus transceivers. They can be used either as two 9-bit
transceivers or one 18-bit transceiver. The test circuitry can be activated by the TAP to take snapshot samples
of the data appearing at the device pins or to perform a self test on the boundary-test cells. Activating the TAP
in the normal mode does not affect the functional operation of the SCOPE
bus transceivers.
Data flow is controlled by the direction-control (DIR) and output-enable (OE) inputs. Data transmission is
allowed from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at DIR. OE can
be used to disable the device so that the buses are effectively isolated.
In the test mode, the normal operation of the SCOPE
bus transceivers is inhibited and the test circuitry is
enabled to observe and control the I/O boundary of the device. When enabled, the test circuitry can perform
boundary-scan test operations according to the protocol described in IEEE Standard 1149.1-1990.
Copyright
1996, Texas Instruments Incorporated
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
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1DIR
1B1
1B2
GND
1B3
1B4
VCC
1B5
1B6
1B7
GND
1B8
1B9
2B1
2B2
2B3
2B4
GND
2B5
2B6
2B7
VCC
2B8
2B9
GND
2DIR
TDO
TMS
1OE
1A1
1A2
GND
1A3
1A4
VCC
1A5
1A6
1A7
GND
1A8
1A9
2A1
2A2
2A3
2A4
GND
2A5
2A6
2A7
VCC
2A8
2A9
GND
2OE
TDI
TCK
SN54ABT18640 ...WD PACKAGE
SN74ABT18640 . . . DGG OR DL PACKAGE
(TOP VIEW)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
SCOPE, Widebus, and EPIC-
ΙΙB are trademarks of Texas Instruments Incorporated.
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.