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参数资料
| 型号： | SN74ABT18640DGGR |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 总线收发器 |
| 英文描述： | ABT SERIES, DUAL 9-BIT BOUNDARY SCAN TRANSCEIVER, INVERTED OUTPUT, PDSO56 |
| 封装： | GREEN, PLASTIC, TSSOP-56 |
| 文件页数： | 31/32页 |
| 文件大小： | 638K |
| 代理商： | SN74ABT18640DGGR |
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SN54ABT18640, SN74ABT18640
SCAN TEST DEVICES
WITH 18-BIT INVERTING BUS TRANSCEIVERS
SCBS267C – FEBRUARY 1994 – REVISED JULY 1996
8
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
register overview
With the exception of the bypass and device-identification registers, any test register can be thought of as a
serial shift register with a shadow latch on each bit. The bypass and device-identification registers differ in that
they contain only a shift register. During the appropriate capture state (Capture-IR for instruction register,
Capture-DR for data registers), the shift register can be parallel loaded from a source specified by the current
instruction. During the appropriate shift state (Shift-IR or Shift-DR), the contents of the shift register are shifted
out from TDO while new contents are shifted in at TDI. During the appropriate update state (Update-IR or
Update-DR), the shadow latches are updated from the shift register.
instruction register description
The instruction register (IR) is eight bits long and tells the device what instruction is to be executed. Information
contained in the instruction includes the mode of operation (either normal mode, in which the device performs
its normal logic function, or test mode, in which the normal logic function is inhibited or altered), the test operation
to be performed, which of the four data registers is to be selected for inclusion in the scan path during
data-register scans, and the source of data to be captured into the selected data register during Capture-DR.
Table 3 lists the instructions supported by the ’ABT18640. The even-parity feature specified for SCOPE
devices is supported in this device. Bit 7 of the instruction opcode is the parity bit. Any instructions that are
defined for SCOPE
devices but are not supported by this device default to BYPASS.
During Capture-IR, the IR captures the binary value 10000001. As an instruction is shifted in, this value is shifted
out via TDO and can be inspected as verification that the IR is in the scan path. During Update-IR, the value
that has been shifted into the IR is loaded into shadow latches. At this time, the current instruction is updated
and any specified mode change takes effect. At power up or in the Test-Logic-Reset state, the IR is reset to the
binary value 10000001, which selects the IDCODE instruction. The IR order of scan is shown in Figure 2.
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
TDO
TDI
Bit 7
Parity
(MSB)
Bit 0
(LSB)
Figure 2. Instruction Register Order of Scan
data register description
boundary-scan register
The boundary-scan register (BSR) is 44 bits long. It contains one boundary-scan cell (BSC) for each
normal-function input pin, one BSC for each normal-function I/O pin (one single cell for both input data and
output data), and one BSC for each of the internally decoded output-enable signals (1OEA, 2OEA, 1OEB,
2OEB). The BSR is used 1) to store test data that is to be applied externally to the device output pins, and/or
2) to capture data that appears internally at the outputs of the normal on-chip logic and/or externally at the device
input pins.
The source of data to be captured into the BSR during Capture-DR is determined by the current instruction. The
contents of the BSR can change during Run-Test/Idle as determined by the current instruction. At power up or
in Test-Logic-Reset, BSCs 43–40 are reset to logic 0, ensuring that these cells, which contol A-port and B-port
outputs, are set to benign values (i.e., if test mode were invoked, the outputs would be at the high-impedance
state). Reset values of other BSCs should be considered indeterminate.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| SN74ABT18640DL | 功能描述:特定功能逻辑 Device w/18-Bit Inv Bus Transceiver RoHS:否 制造商:Texas Instruments 产品: 系列:SN74ABTH18502A 工作电源电压:5 V 封装 / 箱体:LQFP-64 封装:Tube |
| SN74ABT18640DLG4 | 功能描述:特定功能逻辑 Device w/18-Bit Inv Bus Transceiver RoHS:否 制造商:Texas Instruments 产品: 系列:SN74ABTH18502A 工作电源电压:5 V 封装 / 箱体:LQFP-64 封装:Tube |
| SN74ABT18640DLR | 功能描述:特定功能逻辑 Device w/18-Bit Inv Bus Transceiver RoHS:否 制造商:Texas Instruments 产品: 系列:SN74ABTH18502A 工作电源电压:5 V 封装 / 箱体:LQFP-64 封装:Tube |
| SN74ABT18640DLRG4 | 功能描述:特定功能逻辑 Device w/18-Bit Inv Bus Transceiver RoHS:否 制造商:Texas Instruments 产品: 系列:SN74ABTH18502A 工作电源电压:5 V 封装 / 箱体:LQFP-64 封装:Tube |
| SN74ABT18646 | 制造商:TI 制造商全称:Texas Instruments 功能描述:WITH 18-BIT TRANSCEIVER AND REGISTER |
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