参数资料
型号: SN74LVTH18640
厂商: Texas Instruments, Inc.
英文描述: 3.3-V ABT Scan Test Device With 18-Bit Inverting Bus Transceivers(3.3V ABT 扫描检测装置(18位反相总线收发器))
中文描述: 的3.3V ABT生根粉扫描测试设备与18位反相总线收发器(3.3V的ABT生根粉扫描检测装置(18位反相总线收发器))
文件页数: 5/34页
文件大小: 707K
代理商: SN74LVTH18640
SN54LVTH18640, SN54LVTH182640, SN74LVTH18640, SN74LVTH182640
3.3-V ABT SCAN TEST DEVICES
WITH 18-BIT INVERTING BUS TRANSCEIVERS
SCBS310C – MARCH 1994 – REVISED DECEMBER 1996
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
test architecture
Serial-test information is conveyed by means of a 4-wire test bus or TAP, that conforms to IEEE Standard
1149.1-1990. Test instructions, test data, and test control signals all are passed along this serial-test bus. The
TAP controller monitors two signals from the test bus, TCK and TMS. The TAP controller extracts the
synchronization (TCK) and state control (TMS) signals from the test bus and generates the appropriate on-chip
control signals for the test structures in the device. Figure 1 shows the TAP-controller state diagram.
The TAP controller is fully synchronous to the TCK signal. Input data is captured on the rising edge of TCK and
output data changes on the falling edge of TCK. This scheme ensures data to be captured is valid for fully
one-half of the TCK cycle.
The functional block diagram shows the IEEE Standard 1149.1-1990 4-wire test bus and boundary-scan
architecture and the relationship among the test bus, the TAP controller, and the test registers. As shown, the
device contains an 8-bit instruction register and four test-data registers: a 44-bit boundary-scan register, a 3-bit
boundary-control register, a 1-bit bypass register, and a 32-bit device-identification register.
Test-Logic-Reset
Run-Test/Idle
Select-DR-Scan
Capture-DR
Shift-DR
Exit1-DR
Pause-DR
Update-DR
TMS = L
TMS = L
TMS = H
TMS = L
TMS = H
TMS = H
TMS = L
TMS = H
TMS = L
TMS = L
TMS = H
TMS = L
Exit2-DR
Select-IR-Scan
Capture-IR
Shift-IR
Exit1-IR
Pause-IR
Update-IR
TMS = L
TMS = L
TMS = H
TMS = L
TMS = H
TMS = H
TMS = L
TMS = H
TMS = L
Exit2-IR
TMS = L
TMS = H
TMS = H
TMS = H
TMS = L
TMS = H
TMS = L
TMS = H
TMS = H
TMS = H
TMS = L
Figure 1. TAP-Controller State Diagram
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相关PDF资料
PDF描述
SN54LVTH18646A 3.3-V ABT Scan Test Device With 18-Bit Transceivers and Registers(3.3V ABT 扫描检测装置(18位收发器和寄存器))
SN54LVTH182646A 3.3-V ABT Scan Test Device With 18-Bit Transceivers and Registers(3.3V ABT 扫描检测装置(18位收发器和寄存器))
SN54LVTH18652A 3.3-V ABT Scan Test Device With 18-Bit Transceivers and Registers(3.3V ABT 扫描检测装置(18位收发器和寄存器))
SN54LVTH182652A 3.3-V ABT Scan Test Device With 18-Bit Transceivers and Registers(3.3V ABT 扫描检测装置(18位收发器和寄存器))
SN54LVTH2245 Octal 3-State Noninverting Buffer/Line Driver/Line Receiver; Package: 20 LEAD PDIP; No of Pins: 20; Container: Rail; Qty per Container: 18
相关代理商/技术参数
参数描述
SN74LVTH18646APM 功能描述:特定功能逻辑 3.3-V ABT w/18-Bit Trnscvr & Register RoHS:否 制造商:Texas Instruments 产品: 系列:SN74ABTH18502A 工作电源电压:5 V 封装 / 箱体:LQFP-64 封装:Tube
SN74LVTH18646APMG4 功能描述:特定功能逻辑 3.3-V ABT w/18-Bit Trnscvr & Register RoHS:否 制造商:Texas Instruments 产品: 系列:SN74ABTH18502A 工作电源电压:5 V 封装 / 箱体:LQFP-64 封装:Tube
SN74LVTH18652APM 功能描述:特定功能逻辑 3.3-V ABT w/18-Bit Trnscvr & Register RoHS:否 制造商:Texas Instruments 产品: 系列:SN74ABTH18502A 工作电源电压:5 V 封装 / 箱体:LQFP-64 封装:Tube
SN74LVTH18652APMG4 功能描述:特定功能逻辑 3.3-V ABT w/18-Bit Trnscvr & Register RoHS:否 制造商:Texas Instruments 产品: 系列:SN74ABTH18502A 工作电源电压:5 V 封装 / 箱体:LQFP-64 封装:Tube
SN74LVTH2245DBR 功能描述:总线收发器 Tri-St ABT Octal Bus RoHS:否 制造商:Fairchild Semiconductor 逻辑类型:CMOS 逻辑系列:74VCX 每芯片的通道数量:16 输入电平:CMOS 输出电平:CMOS 输出类型:3-State 高电平输出电流:- 24 mA 低电平输出电流:24 mA 传播延迟时间:6.2 ns 电源电压-最大:2.7 V, 3.6 V 电源电压-最小:1.65 V, 2.3 V 最大工作温度:+ 85 C 封装 / 箱体:TSSOP-48 封装:Reel