参数资料
型号: SP6136ER1-L
厂商: Exar Corporation
文件页数: 9/18页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM VM 16-QFN
标准包装: 490
PWM 型: 电压模式
输出数: 1
频率 - 最大: 680kHz
占空比: 92%
电源电压: 5 V ~ 24 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 16-VFQFN 裸露焊盘
包装: 散装
其它名称: 1016-1394
APPLICATION INFORMATION
[ I OUT ? (V OUT /V IN ) ?  .5 ]
20VratedMOSFETissufficient.Forconvert-
ers with  0- 5V IN , as in the above example,
select a 30V MOSFET.
R DS ( ON ) =
2
P
{ }
R DS ( ON ) =
[ { I OUT ? ( -V OUT /V IN ) } ?  .5 ]
ThecalculationofR DS(ON) forTopandBottom
MOSFETs is interrelated and can be done
using the following procedure:
 ) Calculate the maximum permissible
power dissipation P ( DISSIPATION ) based on
required efficiency. The converter in the
above example should deliver an output
power P OUT = 3.3V? 0A = 33W. For a target
efficiency of 94%, input power P IN is given
by P IN = P OUT /0.94 = 35. W. Maximum al-
lowable power dissipation is then:
P ( DISSIPATION ) = P IN – P OUT = 2.  W
2) Calculate the total power dissipation in
top and bottom MOSFETs P ( MOSFET ) by sub-
tracting inductor losses from P ( dissipation )
calculated in step  . To simplify, disregard
core losses; then P L = I 2 RMS ? DCR ?  .4,
where  .4 accounts for the increase in DCR
at operating temperature. For the above
example P L = 0.63W. Then:
P ( MOSFET ) = 2. W – 0.63W =  .47W.
3) Calculate R DS(ON) of the bottom MOSFET
by allocating 40% of calculated losses to it.
40% dissipation allocation reflects the fact
that the the top MOSFET has essentially no
switching loss. Then P ( BOTTOM ) = 0.4X .47W
= 0.59W. R DS(ON) = P/(I 2 RMS ?  .5) where I RMS
= I OUT ? {  -(V OUT /V IN ) } 0.5 and  .5 accounts
for the increase in R DS(ON) at the operating
temperature. Then:
P
2
= 5.4 W .
4) Allocate 60% of the calculated losses
=  0.7 W .
Gate-to-drain charge Q GD for the top MOS-
FET needs to be specified. A simplified
expression for switching losses is:
Ps = I OUT ? V IN ? f ? V IN + I OUT ...................(3)
d v/dt d i/dt
where dv/dt and di/dt are the rates at which
voltage and current transition across the top
MOSFET respectively, and f is the switching
frequency. Voltage switching time ( V IN / d v/dt )
is related to Q GD :
( V IN / d v/dt ) = Q GD /I G ............................... (4)
where I G is Current charging the gate-to-drain
capacitance. It can be calculated from:
I G = (V DRIVE -V GATE )/R DRIVE ......................(5)
where V DRIVE is the drive voltage of the
SP6 36 top driver minus the drop across the
boost diode (approximately 4.5V); V GATE is
the top MOSFET’s gate voltage correspond -
ing to I OUT (assume 2.5V) and R DRIVE is the
internal resistance of the SP6 36 top driver
(assume 2 W average for turn-on and turn-off).
Substituting these values in equation (5) we
get I G =  A. Substituting for I G in equation
(4), we get ( V IN / d v/dt ) = Q GD . Substituting
for ( V IN / d v/dt ) in equation (3) we have:
Ps = I OUT ? V IN ? f ? { Q GD + (I OUT / d i/dt ) }
Solving for Q GD we get:
{ I
}
to  the  top  MOSFET,  P (TOP) =  0.6X .47  =
0.88W. Assume conduction losses equal
to switching losses, then P = 0.5X0.88W =
Q GD =
Ps
OUT ? V IN ? f
_ I OUT .............. (6)
d i/dt
0.44W. Since it operates at the duty cycle
of D=V IN /V OUT ; then:
Di/dt is usually limited by parasitic DC-Loop
Inductance (Lp) according to di/dt = V IN /Lp.
Oct 3 -06 Rev L
SP6 36 Synchronous Buck Controller
9
? 2006 Sipex Corporation
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