参数资料
型号: SP6656EB
厂商: Exar Corporation
文件页数: 8/16页
文件大小: 0K
描述: EVAL BOARD FOR SP6656
标准包装: 1
系列: *
THEORY OF OPERATION
The SP6656 is a high efficiency synchro-
nous buck regulator with an input voltage
range of +2.7V to +5.5V and an output that
is adjustable between +1.0V and V IN . The
SP6656 features a unique on-time control
loop that runs in discontinuous conduction
mode (DCM) or continuous conduction mode
(CCM) using synchronous rectification.
Other features include over-temperature
DRVON
I(L1)
RAMP: CCM OPERATION
REF, FB
shutdown, over-current protection, an ex-
ternal feedback pin, digitally controlled en-
FB’
V OS
REF’
able and output voltage selection.
The SP6656 operates with a light load qui-
escent current of 20 μ A using a 0.3 ? PMOS
main switch and a 0a.3 ? NMOS synchro-
nous switch. It operates with excellent effi-
ciency across the entire load range, making
it an ideal solution for battery powered ap-
plications and low current step-down con-
versions. The part smoothly transitions into
a 100% duty cycle under heavy load/low
input voltage conditions.
DRVON
I(L1)
RAMP: DCM OPERATION
FB’
REF, FB
On-Time Control - Charge Phase
The SP6656 uses a precision comparator
and a minimum on-time to regulate the
output voltage and control the inductor cur-
REF’
V OS
rent under normal load conditions. As the
feedback pin drops below the regulation
point, the loop comparator output goes high
and closes the main switch. The minimum
on-timer is triggered, setting a logic high for
the duration defined by:
operation in both CCM and DCM operation.
In either CCM or DCM, the negative going
ramp voltage (V RAMP in the functional dia-
gram) is added to FB and this creates the
FB's signal. This FB signal is applied to the
T ON =
K ON
V IN - V OUT
.
negative terminal of the loop comparator.
To the positive terminal of the loop com-
parator is applied the REF voltage of 0.8V
where:
K ON = 2.25V* μ Sec constant
V IN = V IN pin voltage
V OUT = V OUT pin voltage
To accommodate the use of ceramic and
other low ESR capacitors, an open loop
ramp is added to the feedback signal to
mimic the inductor current ripple. The fol-
lowing waveforms describe the ideal ramp
plus an offset voltage Vos to compensate
for the DC level of V RAMP applied to the
negative terminal. The result is an internal
ramp with enough negative going offset
(approximately 50mV) to trip the loop com-
parator whenever FB falls below regulation.
The output of the loop comparator, a rising
VOLOW, causes a SET if BLANK = 0 and
OVR_I = 0. This starts inductor charging
(DRVON = 1) and starts the minimum on-
Date: 3/6/06
SP6656, 400mA Synchronous Buck Regulator with Dynamically Adjustable Voltage Output
8
? Copyright 2006 Sipex Corporation
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