参数资料
型号: SPC560P50L3CEFBR
厂商: STMICROELECTRONICS
元件分类: 微控制器/微处理器
英文描述: 32-BIT, FLASH, 64 MHz, MICROCONTROLLER, PQFP100
封装: 14 X 14 MM, ROHS COMPLIANT, LQFP-100
文件页数: 11/31页
文件大小: 411K
代理商: SPC560P50L3CEFBR
SPC560P44Lx, SPC560P50Lx
Overview of the SPC560Px
Doc ID 13950 Rev 5
3.2.20
FlexRay
The FlexRay module provides the following features:
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Full implementation of FlexRay Protocol Specification 2.1
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32 configurable message buffers can be handled
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Dual channel or single channel mode of operation, each up to 10 Mbit/s data rate
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Message buffers configurable as Tx, Rx or RxFIFO
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Message buffer size configurable
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Message filtering for all message buffers based on FrameID, cycle count and message
ID
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Programmable acceptance filters for RxFIFO message buffers
3.2.21
Serial communication interface module (LINFlex)
The LINFlex (Local Interconnect Network Flexible) on the SPC560Px features the following:
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Supports LIN master mode, LIN slave mode and UART mode
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LIN state machine compliant to LIN1.3, 2.0, and 2.1 Specifications
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Handles LIN frame transmission and reception without CPU intervention
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LIN features
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Autonomous LIN frame handling
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Message buffer to store Identifier and as much as 8 data bytes
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Supports message length as long as 64 bytes
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Detection and flagging of LIN errors: sync field; delimiter; ID parity; bit; framing;
checksum and time-out errors
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Classic or extended checksum calculation
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Configurable break duration as long as 36-bit times
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Programmable baud rate prescalers (13-bit mantissa, 4-bit fractional)
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Diagnostic features: loop back; self test; LIN bus stuck dominant detection
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Interrupt-driven operation with 16 interrupt sources
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LIN slave mode features
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Autonomous LIN header handling
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Autonomous LIN response handling
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UART mode
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Full-duplex operation
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Standard Non Return-to-Zero (NRZ) mark/space format
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Data buffers with 4-byte receive, 4-byte transmit
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Configurable word length (8-bit or 9-bit words)
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Error detection and flagging
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Parity, noise and framing errors
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Interrupt-driven operation with four interrupt sources
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Separate transmitter and receiver CPU interrupt sources
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16-bit programmable baud-rate modulus counter and 16-bit fractional
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Two receiver wake-up methods
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