参数资料
型号: SPC560P50L3CEFBR
厂商: STMICROELECTRONICS
元件分类: 微控制器/微处理器
英文描述: 32-BIT, FLASH, 64 MHz, MICROCONTROLLER, PQFP100
封装: 14 X 14 MM, ROHS COMPLIANT, LQFP-100
文件页数: 4/31页
文件大小: 411K
代理商: SPC560P50L3CEFBR
Overview of the SPC560Px
SPC560P44Lx, SPC560P50Lx
Doc ID 13950 Rev 5
The crossbar provides the following features:
●
4 master ports:
–
e200z0 core complex Instruction port
–
e200z0 core complex load/store data port
–eDMA
–FlexRay
●
3 slave ports:
–
Flash memory (code flash and data flash)
–SRAM
–
Peripheral bridge
●
32-bit internal address, 32-bit internal data paths
●
Fixed priority arbitration based on port master
●
Temporary dynamic priority elevation of masters
3.2.3
Enhanced Direct Memory Access (eDMA)
The enhanced Direct Memory Access (eDMA) controller is a second-generation module
capable of performing complex data movements via 16 programmable channels, with
minimal intervention from the host processor. The hardware micro architecture includes a
DMA engine which performs source and destination address calculations, and the actual
data movement operations, along with an SRAM-based memory containing the Transfer
Control Descriptors (TCD) for the channels. This implementation is utilized to minimize the
overall block size.
The eDMA module provides the following features:
●
16 channels support independent 8-, 16-, or 32-bit single value or block transfers
●
Supports variable sized queues and circular queues
●
Source and destination address registers are independently configured to post-
increment or remain constant
●
Each transfer is initiated by a peripheral, CPU or eDMA channel request
●
Each eDMA channel can optionally send an interrupt request to the CPU on completion
of a single value or block transfer
●
DMA transfers possible between system memories, DSPI’s, ADC, FlexPWM, eTimer
and CTU
●
Programmable DMA Channel Mux allows assignment of any DMA source to any
available DMA channel with up to 30 potential request sources.
●
eDMA abort operation through software
3.2.4
On-chip flash memory with ECC
The SPC560Px provides as much as 576 KB of programmable, non-volatile, flash memory.
The Non-Volatile Memory (NVM) can be used for instruction and/or data storage. The flash
memory module interfaces the system bus to a dedicated flash memory array controller. It
supports a 32-bit data bus width at the system bus port, and a 128-bit read data interface to
flash memory. The module contains a four-entry, 4x128-bit prefetch buffers. Prefetch buffer
hits allow no-wait responses. Normal flash memory array accesses are registered and are
forwarded to the system bus on the following cycle, incurring 3 wait-states.
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