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参数资料
| 型号： | SPEAR300-2 |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, FLASH, 333 MHz, RISC MICROCONTROLLER, PBGA289 |
| 封装： | 15 X 15 MM, 1.70 MM HEIGHT, 0.80 MM PITCH, ROHS COMPLIANT, LFBGA-289 |
| 文件页数： | 3/83页 |
| 文件大小： | 1027K |
| 代理商： | SPEAR300-2 |
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SPEAr300
Architecture overview
Doc ID 16324 Rev 2
11/83
2
Architecture overview
The SPEAr300 internal architecture is based on several shared subsystem logic blocks
interconnected through a multilayer interconnection matrix.
The switch matrix structure allows different subsystem dataflow to be executed in parallel
improving the core platform efficiency.
High performance master agents are directly interconnected with the memory controller
reducing the memory access latency. The overall memory bandwidth assigned to each
master port can be programmed and optimized through an internal efficient weighted round-
robin arbitration mechanism.
Figure 2.
SPEAr300 overview
2.1
ARM926EJ-S CPU
The core of the SPEAr300 is an ARM926EJ-S reduced instruction set computer (RISC)
processor.
It supports the 32-bit ARM and 16-bit Thumb instruction sets, enabling the user to trade off
between high performance and high code density and includes features for efficient
execution of Java byte codes.
The ARM CPU and is clocked at a frequency up to 333 MHz. It has a 16-Kbyte instruction
cache, a 16-Kbyte data cache, and features a memory management unit (MMU) which
makes it fully compliant with Linux and WindowsCE operating systems.
It also includes an embedded trace module (ETM Medium+) for real-time CPU activity
tracing and debugging. It supports 4-bit and 8-bit normal trace mode and 4-bit demultiplexed
trace mode, with normal or half-rate clock.
TouchScreen
Keypad
controller
Internet
access
SPEAr300
ADC
GPIO
FSMC
NOR Flash
NAND Flash
SRAM
LCD controller
USB2.0 PHY
Phy
SPEAr300
ARM 926EJ
up to 333 MHz
57 KB embed. SRAM
32 KB embed. ROM
MMU
DDR
memory
controller
DDR2
Mobile DDR
EEPROM
SMI
Flash
USB2.0 PHY
8-channel DMA
3 Timers / WD
Standard OS
support
Interrupt/syst controller
SDIO/MMC
MMC
SD-Card
SDIO
controller
Mobile DDR
Db
t
Db
t
JTAG
I2C
JPEG Codec
accelerator
C3 Crypto
accelerator
IdDA
Clock, reset
32 kHz
24 MHz
RTC
Camera
interface
Debug, trace
ETM9
I2C
I2S
Audio
CODECs
TDM
External
CODEC/SLICs
Note: Some interfaces share I/Os. Not all interfaces shown in the figure can be used
concurrently
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相关代理商/技术参数 |
参数描述 |
|---|---|
| SPEAR310-2 | 功能描述:微处理器 - MPU MPU ARM926 Cortex 8-ch DMA 32KB Rom RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324 |
| SPEAR320 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:Embedded MPU with ARM926 core, optimized for factory automation and consumer applications |
| SPEAR320-2 | 功能描述:微处理器 - MPU MPU ARM926 Cortex 8-ch DMA 32KB Rom RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324 |
| SPEAR320S-2 | 制造商:STMicroelectronics 功能描述:SPEAR 32BIT EMBEDDED MICROPROCESSOR ARM926EJ-S (UP TO 333 M - Bulk 制造商:STMicroelectronics 功能描述:SPEAR320 Series 333 MHz 8 kB RAM ARM926 Core Embedded Microprocessor - LFBGA-289 |
| SPEAR600-2 | 功能描述:微处理器 - MPU MPU ARM926 Cortex 8-ch DMA 32KB Rom RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324 |
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