参数资料
型号: SSM2603CPZ-REEL
厂商: Analog Devices Inc
文件页数: 9/32页
文件大小: 0K
描述: IC CODEC AUDIO LOW POWER 28LFCSP
标准包装: 5,000
类型: 立体声音频
分辨率(位): 24 b
ADC / DAC 数量: 2 / 2
三角积分调变:
S/N 比,标准 ADC / DAC (db): 90 / 100
电压 - 电源,模拟: 1.8 V ~ 3.6 V
电压 - 电源,数字: 1.5 V ~ 3.6 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 28-VFQFN 裸露焊盘,CSP
供应商设备封装: 28-LFCSP-VQ
包装: 带卷 (TR)
Data Sheet
SSM2603
Rev. C | Page 17 of 32
SOFTWARE CONTROL INTERFACE
The software control interface provides access to the user-selectable
control registers and can operate with a 2-wire (I2C) interface.
Within each control register is a control data-word consisting of
16 bits, MSB first. Bit B15 to Bit B9 are the register map address,
and Bit B8 to Bit B0 are register data for the associated register map.
SDIN generates the serial control data-word, SCLK clocks the
serial data, and CSB determines the I2C device address. If the
CSB pin is set to 0, the address selected is 0011010; if 1, the
address is 0011011.
CONTROL REGISTER SEQUENCING
1. Enable all of the necessary power management bits of
Register R6 with the exception of the out bit (Bit D4). The
out bit should be set to 1 until the final step of the control
register sequence.
2. After the power management bits are set, program all other
necessary registers, with the exception of the active bit
[Register R9, Bit D0] and the out bit of the power manage-
ment register.
3. As described in the Digital Core Clock section of the
Theory of Operation, insert enough delay time to charge
the VMID decoupling capacitor before setting the active
bit [Register R9, Bit D0] .
4. Finally, to enable the DAC output path of the SSM2603, set
the out bit of Register R6 to 0.
Figure 28. 2-Wire I2C Generalized Clocking Diagram
Figure 29. I2C Write and Read Sequences
07241-
019
P
9
8
1 TO 7
9
8
1 TO 7
9
8
1 TO 7
S
SDIN
SCLK
START
ADDR
R/W
ACK
SUBADDRESS
ACK
STOP
DATA
07241-
022
WRITE
SEQUENCE
READ
SEQUENCE
S
A1
A7
A0
A(S)
S
B15
B9
0
1
0
P
0
...
A1
A7
A0
A(S)
...
B0
B8
B7
A(M)
...
B0
B7
P
...
DEVICE
ADDRESS
DEVICE
ADDRESS
REGISTER
ADDRESS
S
A1
A7
A0
A(S)
B15
B9
B8
0
...
DEVICE
ADDRESS
REGISTER
ADDRESS
REGISTER
DATA
(SLAVE DRIVE)
REGISTER
DATA
S/P = START/STOP BIT.
A0 = I2C R/W BIT.
A(S) = ACKNOWLEDGE BY SLAVE.
A(M) = ACKNOWLEDGE BY MASTER.
A(M) = ACKNOWLEDGE BY MASTER (INVERSION).
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