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参数资料
| 型号： | SST25VF064C-80-4C-Q2AE |
| 厂商： | Microchip Technology |
| 文件页数： | 11/37页 |
| 文件大小： | 0K |
| 描述： | IC FLASH SER 64M DUAL I/O 8WSON |
| 标准包装： | 480 |
| 系列： | SST25 |
| 格式 - 存储器： | 闪存 |
| 存储器类型： | FLASH |
| 存储容量： | 64M（8M x 8） |
| 速度： | 80MHz |
| 接口： | SPI 串行 |
| 电源电压： | 2.7 V ~ 3.6 V |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 8-WDFN 裸露焊盘 |
| 供应商设备封装： | 8-WSON |
| 包装： | 管件 |
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64 Mbit SPI Serial Dual I/O Flash
A Microchip Technology Company
SST25VF064C
Data Sheet
Instructions
Instructions are used to read, write (Erase and Program), and configure the SST25VF064C. The
instruction bus cycles are 8 bits each for commands (Op Code), data, and addresses. The Write-
Enable (WREN) instruction must be executed prior any Page-Program, Dual-Input Page-Program,
Sector-Erase, Block-Erase, Write-Status-Register, Chip-Erase, Program SID, or Lockout SID instruc-
tions. The complete list of instructions is provided in Table 6.
All instructions are synchronized off a high to low transition of CE#. Inputs will be accepted on the ris-
ing edge of SCK starting with the most significant bit. CE# must be driven low before an instruction is
entered and must be driven high after the last bit of the instruction has been shifted in (except for
Read, Read-ID, and Read-Status-Register instructions). Any low to high transition on CE#, before
receiving the last bit of an instruction bus cycle, will terminate the instruction in progress and return the
device to standby mode. Instruction commands (Op Code), addresses, and data are all input from the
most significant bit (MSB) first.
Table 6: Device Operation Instructions
Address
Dummy
Data
Instruction
Description
Op Code Cycle 1
Cycle(s) 2 Cycle(s)
Cycle(s)
Read
Read Memory
0000 0011b (03H)
3
0
1 to ?
Fast-Read Dual I/O
Read Memory with Dual Address Input 1011 1011b (BBH)
3 3
1 3
1 to ? 3
and Data Output
Fast-Read Dual-Out-
Read Memory with Dual Output
0011 1011b (3BH)
3
1
1 to ? 3
put
High-Speed Read
Sector-Erase 4
Read Memory at Higher Speed
Erase 4 KByte of memory array
0000 1011b (0BH)
0010 0000b (20H)
3
3
1
0
1 to ?
0
32 KByte Block-Erase 5 Erase 32KByte block of memory array
0101 0010b (52H)
3
0
0
64 KByte Block-Erase 6
Erase 64 KByte block of memory array 1101 1000b (D8H)
3
0
0
Chip-Erase
Erase Full Memory Array
0110 0000b (60H) or
0
0
0
1100 0111b (C7H)
Page-Program
Dual-Input Page-
To Program 1 to 256 Data Bytes
To Program 1 to 256 Data Bytes
0000 0010b (02H)
1010 0010b (A2H)
3
3
0
0
1 to 256
1 to 128 3
Program
RDSR 7
EWSR
WRSR
WREN
WRDI
RDID 8
Read-Status-Register
Enable-Write-Status-Register
Write-Status-Register
Write-Enable
Write-Disable
Read-ID
0000 0101b (05H)
0101 0000b (50H)
0000 0001b (01H)
0000 0110b (06H)
0000 0100b (04H)
1001 0000b (90H) or
0
0
0
0
0
3
0
0
0
0
0
0
1 to ?
0
1
0
0
1 to ?
1010 1011b (ABH)
JEDEC-ID
EHLD
JEDEC ID Read
Enable HOLD# pin functionality of the
1001 1111b (9FH)
1010 1010b (AAH)
0
0
0
0
3 to ?
0
RST#/HOLD# pin
Read SID
Program SID 9
Read Security ID
Program User Security ID area
1000 1000b (88H)
1010 0101b (A5H)
1
1
1
0
1 to 32
1 to 24
Lockout
SID 9
Lockout Security ID Programming
1000 0101b (85H)
0
0
0
1. One bus cycle is eight clock periods.
T6.0
25036
?2011 Silicon Storage Technology, Inc.
11
DS25036A
06/11
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相关代理商/技术参数 |
参数描述 |
|---|---|
| SST25VF064C-80-4C-Q2AE-T | 功能描述:闪存 2.7V to 3.6V 64Mbit SPI Serial 闪存 RoHS:否 制造商:ON Semiconductor 数据总线宽度:1 bit 存储类型:Flash 存储容量:2 MB 结构:256 K x 8 定时类型: 接口类型:SPI 访问时间: 电源电压-最大:3.6 V 电源电压-最小:2.3 V 最大工作电流:15 mA 工作温度:- 40 C to + 85 C 安装风格:SMD/SMT 封装 / 箱体: 封装:Reel |
| SST25VF064C-80-4C-Q2CE | 制造商:SST 制造商全称:Silicon Storage Technology, Inc 功能描述:64 Mbit SPI Serial Dual I/O Flash |
| SST25VF064C-80-4C-S3AE | 制造商:SST 制造商全称:Silicon Storage Technology, Inc 功能描述:64 Mbit SPI Serial Dual I/O Flash |
| SST25VF064C-80-4C-S3CE | 制造商:SST 制造商全称:Silicon Storage Technology, Inc 功能描述:64 Mbit SPI Serial Dual I/O Flash |
| SST25VF064C-80-4C-SAE | 制造商:SST 制造商全称:Silicon Storage Technology, Inc 功能描述:64 Mbit SPI Serial Dual I/O Flash |
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