参数资料
型号: SST39VF6402B-70-4I-B1KE-T
厂商: Microchip Technology
文件页数: 8/36页
文件大小: 0K
描述: IC FLASH MPF 64MBIT 70NS 48TFBGA
标准包装: 2,000
系列: SST39 MPF™
格式 - 存储器: 闪存
存储器类型: FLASH
存储容量: 64M(4M x 16)
速度: 70ns
接口: 并联
电源电压: 2.7 V ~ 3.6 V
工作温度: -40°C ~ 85°C
封装/外壳: 48-TFBGA
供应商设备封装: 48-TFBGA
包装: 带卷 (TR)
64 Mbit Multi-Purpose Flash Plus
A Microchip Technology Company
SST39VF6401B / SST39VF6402B
Not Recommended for New Designs
Data# Polling (DQ 7 )
When the SST39VF640xB are in the internal Program operation, any attempt to read DQ 7 will produce
the complement of the true data. Once the Program operation is completed, DQ 7 will produce true
data. Note that even though DQ 7 may have valid data immediately following the completion of an internal Write
operation, the remaining data outputs may still be invalid: valid data on the entire data bus will appear in subse-
quent successive Read cycles after an interval of 1 μs. During internal Erase operation, any attempt to read
DQ 7 will produce a ‘0’. Once the internal Erase operation is completed, DQ 7 will produce a ‘1’. The
Data# Polling is valid after the rising edge of fourth WE# (or CE#) pulse for Program operation. For
Sector-, Block- or Chip-Erase, the Data# Polling is valid after the rising edge of sixth WE# (or CE#)
pulse. See Figure 6 for Data# Polling timing diagram and Figure 20 for a flowchart.
Toggle Bits (DQ6 and DQ2)
During the internal Program or Erase operation, any consecutive attempts to read DQ 6 will produce
alternating “1”s and “0”s, i.e., toggling between 1 and 0. When the internal Program or Erase operation
is completed, the DQ 6 bit will stop toggling. The device is then ready for the next operation. For Sector-
, Block-, or Chip-Erase, the toggle bit (DQ 6 ) is valid after the rising edge of sixth WE# (or CE#) pulse.
DQ 6 will be set to “1” if a Read operation is attempted on an Erase-Suspended Sector/Block. If Pro-
gram operation is initiated in a sector/block not selected in Erase-Suspend mode, DQ 6 will toggle.
An additional Toggle Bit is available on DQ 2 , which can be used in conjunction with DQ 6 to check
whether a particular sector is being actively erased or erase-suspended. Table 2 shows detailed status
bits information. The Toggle Bit (DQ 2 ) is valid after the rising edge of the last WE# (or CE#) pulse of
Write operation. See Figure 7 for Toggle Bit timing diagram and Figure 20 for a flowchart.
Table 2: Write Operation Status
Status
DQ 7
DQ 6
DQ 2
Normal Operation
Erase-Suspend
Mode
Standard Program
Standard Erase
Read from Erase-Suspended Sector/Block
Read from Non- Erase-Suspended Sector/Block
Program
DQ 7 #
0
1
Data
DQ 7 #
Toggle
Toggle
1
Data
Toggle
No Toggle
Toggle
Toggle
Data
N/A
T2.0 25008
Note: DQ 7 and DQ 2 require a valid address when reading status information.
?2011 Silicon Storage Technology, Inc.
8
DS25008A
08/11
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