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参数资料
| 型号： | SST55LC100-45-C-TQWE |
| 元件分类： | 存储控制器/管理单元 |
| 英文描述： | FLASH MEMORY DRIVE CONTROLLER, PQFP100 |
| 封装： | ROHS COMPLIANT, MS-026AED, TQFP-100 |
| 文件页数： | 17/80页 |
| 文件大小： | 758K |
| 代理商： | SST55LC100-45-C-TQWE |
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Advance Information
CompactFlash Card Controller
SST55LC100
2005 Silicon Storage Technology, Inc.
S71298-00-000
10/05
9.0 SOFTWARE INTERFACE
9.1 CF-ATA Drive Register Set Definition and Protocol
The CompactFlash card can be configured as a high performance I/O device through:
1. Standard PC-AT disk I/O address spaces 1F0H-1F7H, 3F6H-3F7H (primary);
170H-177H, 376H-377H (secondary) with IRQ 14 (or other available IRQ)
2. Any system decoded 16 Byte I/O block using any available IRQ
3. Memory space
The communication to or from the CompactFlash card is done using the Task File registers which provide all the
necessary registers for control and status information. The CompactFlash interface connects peripherals to the
host using four register mapping methods. The following is a detailed description of these methods.
9.1.1 I/O Primary and Secondary Address Configurations
Note: Address lines which are not indicated are ignored by the CompactFlash card for accessing all the registers in this table.
TABLE
9-1: I/O CONFIGURATIONS
Standard Configurations
Config Index
I/O or Memory
Address
Description
0
Memory
0H-FH, 400H-7FFH
Memory Mapped
1
I/O
XX0H-XXFH
I/O Mapped 16 Contiguous registers
2
I/O
1F0H-1F7H, 3F6H-3F7H
Primary I/O Mapped
3
I/O
170H-177H, 376H-377H
Secondary I/O Mapped
T9-1.0 1298
TABLE
9-2: PRIMARY AND SECONDARY I/O DECODING
REG#
A9-A4
A3
A2
A1
A0
IORD#=0
IOWR#=0
Note
01F(17)
H
0
Even RD Data
Even WR Data
1,2
1. Register 0 is accessed with CE1# low and CE2# low (and A0 = Don’t Care) as a word register on the combined Odd Data Bus and
Even Data Bus (D15-D0). This register may also be accessed by a pair of byte accesses to the offset 0 with CE1# low and CE2# high.
Note that the address space of this word register overlaps the address space of the Error and Feature byte-wide registers which lie at
offset 1. When accessed twice as byte register with CE1# low, the first byte to be accessed is the Even Byte of the word and the sec-
ond byte accessed is the Odd Byte of the equivalent word access.
2. A byte access to register 0 with CE1# high and CE2# low accesses the error (read) or feature (write) register.
0
1F(17)H
0
1
Error register
Features
0
1F(17)H
0
1
0
Sector Count
0
1F(17)H
00
11
Sector No.
0
1F(17)H
0
1
0
Cylinder Low
0
1F(17)H
0
1
0
1
Cylinder High
0
1F(17)H
0
1
0
Select Card/Head
0
1F(17)H
0
1
Status
Command
0
3F(37)H
0
1
0
Alt Status
Device Control
0
3F(37)H
0
1
Drive Address
Reserved
T9-2.0 1298
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相关代理商/技术参数 |
参数描述 |
|---|---|
| SST55LC100-45-I-BWE | 制造商:SST 制造商全称:Silicon Storage Technology, Inc 功能描述:CompactFlash Card Controller |
| SST55LC100-45-I-TQWE | 制造商:SST 制造商全称:Silicon Storage Technology, Inc 功能描述:CompactFlash Card Controller |
| SST55LC100M | 制造商:SST 制造商全称:Silicon Storage Technology, Inc 功能描述:CompactFlash Card Controller |
| SST55LC100M-45-C-BWE | 功能描述:总线收发器 Compact Flash 45MHz 3.3V Commercial RoHS:否 制造商:Fairchild Semiconductor 逻辑类型:CMOS 逻辑系列:74VCX 每芯片的通道数量:16 输入电平:CMOS 输出电平:CMOS 输出类型:3-State 高电平输出电流:- 24 mA 低电平输出电流:24 mA 传播延迟时间:6.2 ns 电源电压-最大:2.7 V, 3.6 V 电源电压-最小:1.65 V, 2.3 V 最大工作温度:+ 85 C 封装 / 箱体:TSSOP-48 封装:Reel |
| SST55LC100M-45-C-TQWE | 功能描述:总线收发器 Compact Flash 45MHz 3.3V Commercial RoHS:否 制造商:Fairchild Semiconductor 逻辑类型:CMOS 逻辑系列:74VCX 每芯片的通道数量:16 输入电平:CMOS 输出电平:CMOS 输出类型:3-State 高电平输出电流:- 24 mA 低电平输出电流:24 mA 传播延迟时间:6.2 ns 电源电压-最大:2.7 V, 3.6 V 电源电压-最小:1.65 V, 2.3 V 最大工作温度:+ 85 C 封装 / 箱体:TSSOP-48 封装:Reel |
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