参数资料
型号: SST89C58RC-40-C-QIF-T
厂商: Microchip Technology
文件页数: 41/88页
文件大小: 0K
描述: IC MCU 8BIT FLASH 40WQFN
标准包装: 3,000
系列: FlashFlex®
核心处理器: 8051
芯体尺寸: 8-位
速度: 40MHz
连通性: EBI/EMI,I²C,SMBus,UART/USART
外围设备: 欠压检测/复位,POR,WDT
输入/输出数: 32
程序存储器容量: 32KB(32K x 8)
程序存储器类型: 闪存
EEPROM 大小: 2K x 8
RAM 容量: 1K x 8
电压 - 电源 (Vcc/Vdd): 2.7 V ~ 5.5 V
振荡器型: 外部
工作温度: 0°C ~ 70°C
封装/外壳: 40-WFQFN 裸露焊盘
包装: 带卷 (TR)
2011 Silicon Storage Technology, Inc.
DS25100A
12/11
46
FlashFlex MCU
SST89C58RC
Data Sheet
A Microchip Technology Company
Automatic Address Recognition
Automatic Address Recognition (AAR) helps to reduce the time and power required to communicate
with multiple serial devices. Each device shares the same serial link, but has its own address. In this
configuration, a device is only interrupted when it receives its own address, thus eliminating the soft-
ware overhead to compare addresses.
This same feature helps to save power because it can be used in conjunction with idle mode to reduce
the system’s overall power consumption. AAR allows the other slaves to remain in idle mode while only
one is interrupted. By limiting the number of interruptions, the total current draw on the system is
reduced.
There are two ways to communicate with slaves: a group of them at once, or all of them at once. To
communicate with a group of slaves, the master sends out an address called the given address. To
communicate with all the slaves, the master sends out an address called the “broadcast” address.
AAR can be configured as mode 2 or 3 (9-bit modes) and setting the SM2 bit in SCON. Each slave has
its own SM2 bit set waiting for an address byte (9th bit = 1). The Receive Interrupt (RI) flag will only be
set when the received byte matches either the given address or the broadcast address. Next, the slave
then clears its SM2 bit to enable reception of the data bytes (9th bit = 0) from the master. When the 9th
bit = 1, the master is sending an address. When the 9th bit = 0, the master is sending actual data.
If mode 1 is used, the stop bit takes the place of the 9th bit. Bit RI is set only when the received com-
mand frame address matches the device’s address and is terminated by a valid stop bit. Note that
mode 0 cannot be used. Setting SM2 bit in the SCON register in mode 0 will have no effect.
Each slave’s individual address is specified by SFR SADDR. SFR SADEN is a mask byte that defines
“don’t care” bits to form the given address when combined with SADDR. See the example below:
Using the Given Address to Select Slaves
Any bits masked off by a 0 from SADEN become a “don’t care” bit for the given address. Any bit
masked off by a 1, becomes ANDED with SADDR. The “don’t cares” provide flexibility in the user-
defined addresses to address more slaves when using the given address.
Shown in the example above, Slave 1 has been given an address of 1111 0001 (SADDR). The SADEN
byte has been used to mask off bits to a given address to allow more combinations of selecting Slave 1
and Slave 2. In this case for the given addresses, the last bit (LSB) of Slave 1 is a “don’t care” and the
last bit of Slave 2 is a 1. To communicate with Slave 1 and Slave 2, the master would need to send an
address with the last bit equal to 1 (e.g. 1111 0001) since Slave 1’s last bit is a don’t care and Slave 2’s
last bit has to be a 1. To communicate with Slave 1 alone, the master would send an address with the
last bit equal to 0 (e.g. 1111 0000), since Slave 2’s last bit is a 1. See the tables below for other possi-
ble combinations.
Select Slave 1 Only
Slave 1
Given Address
Possible Addresses
1111 0X0X
1111 0000
1111 0100
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