参数资料
型号: ST16C2552CJ44
厂商: EXAR CORP
元件分类: Serial IO/Communication Controller
英文描述: 2 CHANNEL(S), 4M bps, SERIAL COMM CONTROLLER, PQCC44
封装: PLASTIC, LCC-44
文件页数: 16/38页
文件大小: 447K
代理商: ST16C2552CJ44
ST16C2552
21
REV. 4.2.1
2.97V TO 5.5V DUAL UART WITH 16-BYTE FIFO
LCR[5]: TX and RX Parity Select
If the parity bit is enabled, LCR BIT-5 selects the forced parity format.
LCR[5] = logic 0, parity is not forced (default).
LCR[5] = logic 1 and LCR[4] = logic 0, parity bit is forced to a logical 1 for the transmit and receive data.
LCR[5] = logic 1 and LCR[4] = logic 1, parity bit is forced to a logical 0 for the transmit and receive data.
LCR[6]: Transmit Break Enable
When enabled, the Break control bit causes a break condition to be transmitted (the TX output is forced to a
“space’, logic 0, state). This condition remains, until disabled by setting LCR bit-6 to a logic 0.
Logic 0 = No TX break condition (default).
Logic 1 = Forces the transmitter output (TX) to a “space”, logic 0, for alerting the remote receiver of a line
break condition.
LCR[7]: Baud Rate Divisors Enable
Baud rate generator divisor (DLL/DLM) enable.
Logic 0 = Data registers are selected. (default)
Logic 1 = Divisor latch registers are selected.
4.8
Modem Control Register (MCR) or General Purpose Outputs Control - Read/Write
The MCR register is used for controlling the serial/modem interface signals or general purpose inputs/outputs.
MCR[0]: DTR# Output
The DTR# pin is a modem control output. If the modem interface is not used, this output may be used as a
general purpose output.
Logic 0 = Force DTR# output to a logic 1 (default).
Logic 1 = Force DTR# output to a logic 0.
MCR[1]: RTS# Output
The RTS# pin is a modem control output. If the modem interface is not used, this output may be used as a
general purpose output.
Logic 0 = Force RTS# output to a logic 1 (default).
Logic 1 = Force RTS# output to a logic 0.
MCR[2]: OP1# Output
OP1# is not available as an output pin on the 2552. But it is available for use during Internal Loopback Mode.
In the Loopback Mode, this bit is used to write the state of the modem RI# interface signal.
TABLE 10: PARITY SELECTION
LCR BIT-5 LCR BIT-4 LCR BIT-3
PARITY SELECTION
X
0
No parity
0
1
Odd parity
0
1
Even parity
1
0
1
Force parity to mark, “1”
1
Forced parity to space, “0”
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