参数资料
型号: ST52F510Y3B6
厂商: STMICROELECTRONICS
元件分类: 微控制器/微处理器
英文描述: 8-BIT, FLASH, 24 MHz, MICROCONTROLLER, PDIP16
封装: PLASTIC, DIP-16
文件页数: 46/106页
文件大小: 648K
代理商: ST52F510Y3B6
ST52F510/F513/F514
44/106
6.2 Reset
Four Reset sources are available:
s
RESET pin (external source)
s
WATCHDOG (internal source)
s
POWER ON Reset (Internal source)
s
PLVD Reset (Internal source)
When a Reset event occurs, the user program
restarts from the beginning.
6.2.1 External Reset. Reset is an input pin. An
internal reset does not affect this pin. A Reset
signal
originated
by
external
sources
is
recognized immediately. The RESET pin may be
used to ensure Vdd has risen to a point where the
ICU can operate correctly before the user program
is run. Reset must be set to Vdd in working mode.
A Pull up resistor of 100 K
guarantees that the
RESET pin is at level “1” when no HALT or Power-
On events occur. If an external resistor is
connected to the RESET pin a minimum value of
10K
must be used.
6.2.2 Reset Procedures. After the Reset pin is
set to Vdd or following a Power-On Reset event,
the device is not started until the internal supply
voltage has reached the nominal level of 2.5 V
(corresponding roughly to Vdd=2.8 V).
Figure 6.2 Reset Block Diagram
After this level has been
reached, the internal
oscillator (10 MHZ) is started and a delay period of
4.096 clock cycles is initiated, in order to allow the
oscillator to stabilize and to ensure that recovery
has taken place from the Reset state.
If the device has been configured to work with the
internal clock, the user program is started,
otherwise the Option Byte 7 (WAKEUP) is read
and another count is started before running the
user program. The count duration depends on the
contents of the Option Byte 7 (WAKEUP), that
works as a prescaler, according to the follwing
formula:
This delay has been introduced in order to ensure
that the oscillator has become stable after its
restart.
If the Reset is generated by the PLVD or the
Watchdog, the oscillator is not turned off; for this
reason the CPU is then restarted immediately,
without the delay.
After a RESET procedure is completed, the core
reads the instruction stored in the first 3 bytes of
the Program/Data Memory, which contains a
JUMP instruction to the first instruction of the user
program.
The
Assembler
tool
automatically
generates this Jump instruction with the first
instruction address.
PO WER-ON
RESET
Vdd
RESET
CO UNTER x
4096
PLVD
Vdd
IN TERN A L RE SET
W ATC HD OG RES ET
PLVD R ESET
RST_D ELAY
W ATCHDOG
CLK_MODE
De lay
4096
WAKEUP
1
+
() Tclk
×
=
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