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参数资料
| 型号： | ST624XB-DBE |
| 厂商： | 意法半导体 |
| 英文描述： | REAL TIME EMULATION DEVELOPMENT TOOLS FOR ST6 MCU FAMILY |
| 中文描述： | 实时仿真开发工具，ST6单片机系列 |
| 文件页数： | 47/74页 |
| 文件大小： | 733K |
| 代理商： | ST624XB-DBE |
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47/74
ST62T46B/E46B
SERIAL PERIPHERAL INTERFACE
(Cont’d)
After 8 clock pulses (D7..D0) the output Q4 of the
4-bit binary counter becomes low, disabling the
clock from the counter and the data/shift register.
Q4 enables the clock to generate an interrupt on
the 8th clock falling edge as long as no reset of the
counter (processor write into the 8-bit data/shift
register) takes place. After a processor reset the
interrupt is disabled. The interrupt is active when
writing data in the shift register and desactivated
when writing any data in the SPI Interrupt Disable
register.
The generation of an interrupt to the Core provides
information that new data is available (input mode)
or that transmission is completed (output mode),
allowing the Core to generate an acknowledge on
the 9th clock pulse (I2C-bus).
The interrupt is initiated by a high to low transition,
and therefore interrupt options must be set accord-
ingly as defined in the interrupt section.
After power on reset, or after writing the data/shift
register, the counter is reset to zero and the clock
is enabled. In this condition the data shift register
is ready for reception. No start condition has to be
detected. Through the user software the Core may
pull down the Sin line (Acknowledge) and slow
down the SCL, as long as it is needed to carry out
data from the shift register.
I2C-bus Master-Slave, Receiver-Transmitter
When pins Sin and Sout are externally connected
together it is possible to use the SPI as a receiver
as well as a transmitter. Through software routine
(by using bit-set and bit-reset on I/O line) a clock
can be generated allowing I2C-bus to work in mas-
ter mode.
When implementing an I2C-bus protocol, the start
condition can be detected by setting the processor
into a wait for start condition by enabling the inter-
rupt of the I/O port used for the Sin line. This frees
the processor from polling the Sin and SCL lines.
After the transmission/reception the processor has
to poll for the STOP condition.
In slave mode the user software can slow down
the SCL clock frequency by simply putting the SCL
I/O line in output open-drain mode and writing a
zero into the corresponding data register bit.
As it is possible to directly read the Sin pin directly
through the port register, the software can detect a
difference between internal data and external data
(master mode). Similar condition can be applied to
the clock.
Three (Four) Wire Serial Bus
It is possible to use a single general purpose I/O
pin (with the corresponding interrupt enabled) as a
chip enable pin. SCL acts as active or passive
clock pin, Sin as data in and Sout as data out (four
wire bus). Sin and Sout can be connected together
externally to implement three wire bus.
Note
:
When the SPI is not used, the three I/O lines (Sin,
SCL, Sout) can be used as normal I/O, with the fol-
lowing limitation: bit Sout cannot be used in open
drain mode as this enables the shift register output
to the port.
It is recommended, in order to avoid spurious in-
terrupts from the SPI, to disable the SPI interrupt
(the default state after reset) i.e. no write must be
made to the 8-bit shift register. An explicit interrupt
disable may be made in software by a dummy
write to the SPI interrupt disable register.
SPI Data/Shift Register
Address: DDh - Read/Write (SDSR)
A write into this register enables SPI Interrupt after
8 clock pulses.
SPI Interrupt Disable Register
Address: C2h - Read/Write (SIDR)
A dummy write to this register disables SPI Inter-
rupt.
7
0
D7
D6
D5
D4
D3
D2
D1
D0
7
0
D7
D6
D5
D4
D3
D2
D1
D0
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ST624XB-KIT | 制造商:未知厂家 制造商全称:未知厂家 功能描述:STARTER KIT DATASHEET FOR ST624X |
| ST624XB-KIT/110 | 功能描述:开发板和工具包 - 其他处理器 ST624X Starter Kit RoHS:否 制造商:Freescale Semiconductor 产品:Development Systems 工具用于评估:P3041 核心:e500mc 接口类型:I2C, SPI, USB 工作电源电压: |
| ST624XB-KIT/UK | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:ST62 KIT |
| ST6252 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:8-BIT OTP/EPROM MCUs WITH A/D CONVERTER, AUTO-RELOAD TIMER AND EEPROM |
| ST6252BB1 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:8-BIT OTP/EPROM MCUs WITH A/D CONVERTER, AUTO-RELOAD TIMER AND EEPROM |
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