参数资料
型号: ST7263BK1B/XXX
厂商: STMICROELECTRONICS
元件分类: 微控制器/微处理器
英文描述: 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP32
封装: 0.400 INCH, LEAD FREE, SHRINK, PLASTIC, DIP-32
文件页数: 45/140页
文件大小: 1423K
代理商: ST7263BK1B/XXX
ST7263B
139/140
17 REVISION HISTORY
Date
Revision
Main Changes
27-May-05
3.0
New revision created by merging 32K Flash and non-32K Flash datasheets together
Memory Map, Figure 6, expanded to handle all devices and memory sizes
Operating conditions with LVD values modified, section 13.3.2 on page 106
Supply current characteristics values and notes updated, section 13.4 on page 107
IDD RUN and WAIT graphs replaced, Figure 51 and Figure 52 on page 107
Control timing characteristics modified, section 13.5.2 on page 108
Flash memory table notes and tPROG typical value updated, section 13.6.2 on page 110
Notes added for I/O Port Pin Characteristics table, section 13.8.1 on page 113
Note for RPU modified, removing reference to data characterization, Section 13.8.1
IPU and RPU graphs added, Figure 57 and Figure 58 on page 114
Notes updated for USB low speed electrical characteristics
Output voltage/current graphs added, Figures 59-68
Thermal Characteristics added for SO24 and TQFP48 packages, section 14.2 on page 127
Important note added for OPT 3 Option Byte (LVD), section 15.1 on page 129
Supported Part Numbers table updated with full sales type codes, Table 29
Option List updated with all device options, page 133
Important notes updated with ‘USB behavior with LVD disabled’, section 16.5 on page 137
Clock block diagram redrawn, Figure 17 on page 22
DFU added to title and features list, page 1
Removed unnecessary notes related to Typical Values (already mentioned in section 13.1.2
on page 104) in electrical characteristic tables sections: Section 13.3.2, Section 13.4, Sec-
Added note for max values in ADC Accuracy, Section 13.11
Static Latch Up (LU) class tested only for TA=25°C, section 13.7.3.2 on page 112
19-Sep-05
4.0
Flash memory minimum data retention increased, section 13.6.2 on page 110
AF bit text modified concerning SCL, I2C Chapter Section 11.5.7, "Register Description"
Reference made to the Flash Programming Reference Manual for Flash timing values
Reset pulse generated by WDG changed to 30s, section 11.1 on page 38
Modified text in section 11.3 on page 60, adding Parity error as an interrupt
Added ECOPACK information in section 14 on page 124
Modified IS value and corresponding note in section 13.8.1 on page 113
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