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参数资料
型号： ST72C314N4TC
厂商： STMICROELECTRONICS
元件分类： 微控制器/微处理器
英文描述： 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PQFP64
封装： 14 X 14 MM, ROHS COMPLIANT, TQFP-64
文件页数： 101/150页
文件大小： 3530K
代理商： ST72C314N4TC
ST72334xx-Auto, ST72314xx-Auto, ST72124Jx-Auto
54/150
MAIN CLOCK CONTROLLER WITH REAL-TIME CLOCK TIMER (Cont’d)
MISCELLANEOUS REGISTER 1 (MISCR1)
See Section 12 on page 47.
MAIN CLOCK CONTROL/STATUS REGISTER
(MCCSR)
Read/Write
Reset Value: 0000 0001 (01h)
Bit 7:4 = Reserved, always read as 0.
Bit 3:2 = TB[1:0] Time base control
These bits select the programmable divider time
base. They are set and cleared by software.
A modification of the time base is taken into ac-
count at the end of the current period (previously
set) to avoid unwanted time shift. This allows to
use this time base as a real-time clock.
Bit 1 = OIE Oscillator interrupt enable
This bit set and cleared by software.
0: Oscillator interrupt disabled
1: Oscillator interrupt enabled
This interrupt allows to exit from Active Halt mode.
When this bit is set, calling the ST7 software HALT
instruction enters the Active Halt power saving
mode.
Bit 0 = OIF Oscillator interrupt flag
This bit is set by hardware and cleared by software
reading the CSR register. It indicates when set
that the main oscillator has measured the selected
elapsed time (TB1:0).
0: Timeout not reached
1: Timeout reached
CAUTION: The BRES and BSET instructions
must not be used on the MCCSR register to avoid
unintentionally clearing the OIF bit.
13.2.4 Low Power Modes
13.2.5 Interrupts
The MCC/RTC interrupt event generates an inter-
rupt if the OIE bit of the MCCSR register is set and
the interrupt mask in the CC register is not active
(RIM instruction).
Notes:
1. The MCC/RTC interrupt allows to exit from Active Halt
mode, not from Halt mode.
Table 14. MCC Register Map and Reset Values
7
0
TB1
TB0
OIE
OIF
Counter
Prescaler
Time Base
TB1
TB0
fOSC =8MHz fOSC=16MHz
32000
4ms
2ms
0
64000
8ms
4ms
0
1
160000
20ms
10ms
1
0
400000
50ms
25ms
1
Mod
Description
WAIT
No effect on MCC/RTC peripheral.
MCC/RTC interrupt cause the device to exit
from Wait mode.
ACTIVE
HALT
No effect on MCC/RTC counter (OIE bit is
set), the registers are frozen.
MCC/RTC interrupt cause the device to exit
from Active Halt mode.
HALT
MCC/RTC counter and registers are frozen.
MCC/RTC operation resumes when the
MCU is woken up by an interrupt with “exit
from Halt” capability.
Interrupt Event
Event
Flag
Enable
Control
Bit
Exit
from
Wait
Exit
from
Halt
Time base overflow
event
OIF
OIE
Yes
No 1)
Address
(Hex.)
Register
Label
7
6
5
4
3
2
1
0
0029h
MCCSR
Reset Value
0
TB1
0
TB0
0
OIE
0
OIF
1
相关PDF资料
PDF描述
ST72124J2TC/XXX 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PQFP44
ST72334J4TB/XXX 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PQFP44
ST72C314J2TC 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PQFP44
ST72314N4TA/XXX 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PQFP64
ST72314N4TB/XXX 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PQFP64
相关代理商/技术参数
参数描述
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ST72C334J4T6/TR 制造商:STMicroelectronics 功能描述:
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