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参数资料
型号： ST72C314N4TC
厂商： STMICROELECTRONICS
元件分类： 微控制器/微处理器
英文描述： 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PQFP64
封装： 14 X 14 MM, ROHS COMPLIANT, TQFP-64
文件页数： 50/150页
文件大小： 3530K
代理商： ST72C314N4TC
ST72334xx-Auto, ST72314xx-Auto, ST72124Jx-Auto
143/150
17 DEVICE CONFIGURATION AND ORDERING INFORMATION
17.1 INTRODUCTION
Each device is available for production in user pro-
grammable versions (Flash) as well as in factory
coded versions (ROM). EEPROM data memory
and Flash devices are shipped to customers with a
default content (FFh), while ROM factory coded
parts contain the code supplied by the customer.
This implies that Flash devices have to be config-
ured by the customer using the Option Bytes while
the ROM devices are factory-configured.
17.2 OPTION BYTES
The two option bytes allow the hardware configu-
ration of the microcontroller to be selected.
The option bytes have no address in the memory
map and can be accessed only in programming
mode (for example using a standard ST7 program-
ming tool). The default content of the Flash is fixed
to FFh.
In masked ROM devices, the option bytes are
fixed in hardware by the ROM code (see option
list).
17.2.1 User Option Byte 0
Bit 7:2 = Reserved, must always be 1.
Bit 1 = 64/44 Package Configuration.
This option bit allows to configured the device ac-
cording to the package.
0: 44-pin packages
1: 64-pin packages
Bit 0 = FMP Full memory protection.
This option bit enables or disables external access
to the internal program memory (readout protec-
tion). Clearing this bit causes the erasing (by over-
writing with the currently latched values) of the
whole memory (not including the option bytes).
0: Program memory not readout protected
1: Program memory readout protected
Note: The data EEPROM is not protected by this
bit in Flash devices. In ROM devices, a protection
can be selected in the Option List (see page 145).
17.2.2 User Option Byte 1
Bit 7 = CSS Clock Security System disable
This option bit enables or disables the CSS fea-
tures.
0: CSS enabled
1: CSS disabled
Bit 6:4 = OSC[2:0] Oscillator selection
These three option bits can be used to select the
main oscillator as shown in Table 25.
Bit 3:2 = LVD[1:0] Low voltage detection selection
These option bits enable the LVD block with a se-
lected threshold as shown in Table 26.
Bit 1 = WDG HALT Watchdog Reset on Halt mode
This option bit determines if a RESET is generated
when entering Halt mode while the Watchdog is
active.
0: No Reset generation when entering Halt mode
1: Reset generation when entering Halt mode
Bit 0 = WDG SW Hardware or software watchdog
This option bit selects the watchdog type.
0: Hardware (watchdog always enabled)
1: Software (watchdog to be enabled by software)
Table 25. Main Oscillator Configuration
Table 26. LVD Threshold Configuration
Selected Oscillator
OSC2 OSC1 OSC0
External Clock (Stand-by)
1
~4 MHz Internal RC
1
0
1~14 MHz External RC
1
0
X
Low Power Resonator (LP)
0
1
Medium Power Resonator (MP)
0
1
0
Medium Speed Resonator (MS)
0
1
High Speed Resonator (HS)
0
Configuration
LVD1 LVD0
LVD Off
1
Highest Voltage Threshold (
4.50V)
1
0
Medium Voltage Threshold (
4.05V)
0
1
Lowest Voltage Threshold (
3.45V)
0
USER OPTION BYTE 0
7
0
USER OPTION BYTE 1
7
0
Reserved
64/44 FMP
CSS
OSC
2
OSC
1
OSC
0
LVD1 LVD0
WDG
HALT
WDG
SW
Default
Value
1
X
0
1
0
1
相关PDF资料
PDF描述
ST72124J2TC/XXX 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PQFP44
ST72334J4TB/XXX 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PQFP44
ST72C314J2TC 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PQFP44
ST72314N4TA/XXX 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PQFP64
ST72314N4TB/XXX 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PQFP64
相关代理商/技术参数
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ST72C334J4T6/TR 制造商:STMicroelectronics 功能描述:
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