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参数资料
型号： ST72C314N4TC
厂商： STMICROELECTRONICS
元件分类： 微控制器/微处理器
英文描述： 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PQFP64
封装： 14 X 14 MM, ROHS COMPLIANT, TQFP-64
文件页数： 84/150页
文件大小： 3530K
代理商： ST72C314N4TC
ST72334xx-Auto, ST72314xx-Auto, ST72124Jx-Auto
39/150
POWER SAVING MODES (Cont’d)
10.4.2 Halt Mode
The Halt mode is the lowest power consumption
mode of the MCU. It is entered by executing the
HALT instruction when the OIE bit of the Main
Clock Controller Status register (MCCSR) is
cleared (see Section 13.2 "MAIN CLOCK CON-
TROLLER WITH REAL-TIME CLOCK TIMER
(MCC/RTC)" on page 53 for more details on the
MCCSR register).
The MCU can exit Halt mode on reception of either
a specific interrupt (see Table 6, “Interrupt Map-
ping,” on page 35) or a RESET. When exiting Halt
mode by means of a RESET or an interrupt, the
oscillator is immediately turned on and the 4096
CPU cycle delay is used to stabilize the oscillator.
After the start up delay, the CPU resumes opera-
tion by servicing the interrupt or by fetching the re-
set vector which woke it up (see Figure 24).
When entering Halt mode, the I bit in the CC regis-
ter is forced to 0 to enable interrupts. Therefore, if
an interrupt is pending, the MCU wakes immedi-
ately.
In Halt mode, the main oscillator is turned off caus-
ing all internal processing to be stopped, including
the operation of the on-chip peripherals. All periph-
erals are not clocked except the ones which get
their clock supply from another clock generator
(such as an external or auxiliary oscillator).
The compatibility of Watchdog operation with Halt
mode is configured by the “WDGHALT” option bit
of the option byte. The HALT instruction when ex-
ecuted while the Watchdog system is enabled, can
generate a Watchdog RESET (see Section 17.2
on page 143 for more details).
Figure 23. HALT Timing Overview
Figure 24. Halt Mode Flowchart
Notes:
1. WDGHALT is an option bit. See OPTION
BYTES section for more details.
2. Peripheral clocked with an external clock source
can still be active.
3. Only some specific interrupts can exit the MCU
from Halt mode (such as external interrupt). Refer
to Table 6, “Interrupt Mapping,” on page 35 for
more details.
4. Before servicing an interrupt, the CC register is
pushed on the stack. The I bit of the CC register is
set during the interrupt routine and cleared when
the CC register is popped.
HALT
RUN
4096 CPU CYCLE
DELAY
RESET
OR
INTERRUPT
HALT
INSTRUCTION
FETCH
VECTOR
[MCCSR.OIE=0]
HALT INSTRUCTION
RESET
INTERRUPT 3)
Y
N
Y
CPU
OSCILLATOR
PERIPHERALS 2)
IBIT
OFF
0
OFF
FETCH RESET VECTOR
OR SERVICE INTERRUPT
CPU
OSCILLATOR
PERIPHERALS
IBIT
ON
OFF
X 4)
ON
CPU
OSCILLATOR
PERIPHERALS
IBITS
ON
X 4)
ON
4096 CPU CLOCK CYCLE
DELAY
WATCHDOG
ENABLE
DISABLE
WDGHALT 1)
0
WATCHDOG
RESET
1
(MCCSR.OIE=0)
相关PDF资料
PDF描述
ST72124J2TC/XXX 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PQFP44
ST72334J4TB/XXX 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PQFP44
ST72C314J2TC 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PQFP44
ST72314N4TA/XXX 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PQFP64
ST72314N4TB/XXX 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PQFP64
相关代理商/技术参数
参数描述
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ST72C334J2T6 功能描述:8位微控制器 -MCU Flash 8K SPI/SCI RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT
ST72C334J4B6 功能描述:8位微控制器 -MCU Flash 16K SPI/SCI RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT
ST72C334J4T6 功能描述:8位微控制器 -MCU Flash 16K SPI/SCI RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT
ST72C334J4T6/TR 制造商:STMicroelectronics 功能描述:
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