参数资料
型号: ST72F324K2B3
厂商: STMICROELECTRONICS
元件分类: 微控制器/微处理器
英文描述: 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PDIP32
封装: 0.400 INCH, SHRINK, PLASTIC, DIP-32
文件页数: 145/156页
文件大小: 1012K
代理商: ST72F324K2B3
ST72324J/K
89/156
10.5 SERIAL COMMUNICATIONS INTERFACE (SCI)
10.5.1 Introduction
The Serial Communications Interface (SCI) offers
a flexible means of full-duplex data exchange with
external equipment requiring an industry standard
NRZ asynchronous serial data format. The SCI of-
fers a very wide range of baud rates using two
baud rate generator systems.
10.5.2 Main Features
s
Full duplex, asynchronous communications
s
NRZ standard format (Mark/Space)
s
Dual baud rate generator systems
s
Independently
programmable
transmit
and
receive baud rates up to 500K baud.
s
Programmable data word length (8 or 9 bits)
s
Receive buffer full, Transmit buffer empty and
End of Transmission flags
s
Two receiver wake-up modes:
– Address bit (MSB)
– Idle line
s
Muting function for multiprocessor configurations
s
Separate
enable bits for Transmitter and
Receiver
s
Four error detection flags:
– Overrun error
– Noise error
– Frame error
– Parity error
s
Five interrupt sources with flags:
– Transmit data register empty
– Transmission complete
– Receive data register full
– Idle line received
– Overrun error detected
s
Parity control:
– Transmits parity bit
– Checks parity of received data byte
s
Reduced power consumption mode
10.5.3 General Description
The interface is externally connected to another
device by two pins (see Figure 59):
– TDO: Transmit Data Output. When the transmit-
ter is disabled, the output pin returns to its I/O
port configuration. When the transmitter is ena-
bled and nothing is to be transmitted, the TDO
pin is at high level.
– RDI: Receive Data Input is the serial data input.
Oversampling techniques are used for data re-
covery by discriminating between valid incoming
data and noise.
Through these pins, serial data is transmitted and
received as frames comprising:
– An Idle Line prior to transmission or reception
– A start bit
– A data word (8 or 9 bits) least significant bit first
– A Stop bit indicating that the frame is complete.
This interface usestwo types of baud rate generator:
– A conventional type for commonly-used baud
rates,
– An extended type with a prescaler offering a very
wide range of baud rates even with non-standard
oscillator frequencies.
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