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参数资料
型号： ST7PLUSA2M6TR
厂商： STMICROELECTRONICS
元件分类： 微控制器/微处理器
英文描述： 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDSO8
封装： 0.150 INCH, ROHS COMPLIANT, PLASTIC, SOP-8
文件页数： 12/136页
文件大小： 1705K
代理商： ST7PLUSA2M6TR
Obsolete
Product(s)
- Obsolete
Product(s)
Obsolete
Product(s)
- Obsolete
Product(s)
ST7LITEUS2, ST7LITEUS5
Electrical characteristics
109/136
Figure 49.
Typical IPU vs. VDD with VIN=VSSl
12.8.2
Output driving current characteristics
Subject to general operating conditions for VDD, fCPU, and TA unless otherwise specified.
0
10
20
30
40
50
60
70
80
90
VDD [V]
IP
U
[uA
]
-45°C
25°C
90°C
Table 64.
Output driving current characteristics
Symbol
Parameter
Conditions
Min
Max
Unit
VOL
(1)
Output low level voltage for PA3/RESET standard
I/O pin (see Figure 52)
V
DD
=5
V
IIO= +5 mA,TA≤ 125 °C
1200
mV
IIO = +2 mA,TA≤ 125 °C
400
Output low level voltage for a high sink I/O pin
when 4 pins are sunk at same time (see Figure 55)
IIO=+20 mA,TA≤ 125 °C
1300
IIO = +8 mA,TA≤ 125 °C
750
VOH
(2)
Output high level voltage for an I/O pin when 4 pins
are sourced at same time (see Figure 58)
IIO= -5 mA,TA≤ 125 °C
VDD-1500
IIO = -2 mA,TA≤ 125 °C
VDD-800
VOL
(1)(3)
Output low level voltage for PA3/RESET standard
I/O pin (see Figure 51)
V
DD
=3
V
IIO = +2 mA,TA≤ 125 °C
500
Output low level voltage for a high sink I/O pin
when 4 pins are sunk at same time (see Figure 54)
IIO = +2 mA,TA≤ 125 °C
180
IIO = +8 mA,TA≤ 125 °C
600
VOH
(2)(3)
Output high level voltage for an I/O pin when 4 pins
are sourced at same time (see Figure 57)
IIO = -2 mA,TA≤ 125 °C
VDD-800
VOL
(1)(3)
Output low level voltage for PA3/RESET standard
I/O pin (see Figure 53)
V
DD
=2.4
V
IIO = +2 mA,TA≤ 125 °C
700
Output low level voltage for a high sink I/O pin
when 4 pins are sunk at same time (see Figure 53)
IIO = +2 mA,TA≤ 125 °C
200
IIO=+8 mA,TA≤ 125 °C
800
VOH
(2)(3)
Output high level voltage for an I/O pin when 4 pins
are sourced at same time (see Figure 56)
IIO=-2 mA,TA≤ 125 °C
VDD-900
1.
The IIO current sunk must always respect the absolute maximum rating specified in Table 52 and the sum of IIO (I/O ports and control pins)
must not exceed IVSS.
2.
The IIO current sourced must always respect the absolute maximum rating specified in Table 52 and the sum of IIO (I/O ports and control pins)
must not exceed IVDD. True open drain I/O pins do not have VOH.
3.
Not tested in production, based on characterization results.
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