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参数资料
| 型号： | ST7PLUSA5B6 |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP8 |
| 封装： | 0.300 INCH, ROHS COMPLIANT, PLASTIC, DIP-8 |
| 文件页数： | 79/136页 |
| 文件大小： | 1705K |
| 代理商： | ST7PLUSA5B6 |
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Obsolete
Product(s)
- Obsolete
Product(s)
Obsolete
Product(s)
- Obsolete
Product(s)
ST7LITEUS2, ST7LITEUS5
Interrupts
47/136
AVD Threshold Selection register (AVDTHCR)
Refer to Section 6.3.4: AVD Threshold Selection register (AVDTHCR) for a full description of
this register.
Application notes
The LVDRF flag is not cleared when another reset type occurs (external or watchdog), the
LVDRF flag remains set to keep trace of the original failure.
In this case, a watchdog reset can be detected by software while an external reset can not.
Bit 2 LVDRF LVD reset flag
This bit indicates that the last Reset was generated by the LVD block. It is set by
hardware (LVD reset) and cleared when read. See WDGRF flag description in
Section 10.1.6 on page 69 for more details. When the LVD is disabled by OPTION
BYTE, the LVDRF bit value is undefined.
Note: If the selected clock source is one of the two internal ones, and if VDD
remains below the selected LVD threshold during less than TAWU (33us
typ.), the LVDRF flag cannot be set even if the device is reset by the LVD.
If the selected clock source is the external clock (CLKIN), the flag is never
set if the reset occurs during Halt mode. In run mode the flag is set only if
fCLKIN is greater than 10 MHz.
Bit 1 AVDF Voltage Detector flag
This read-only bit is set and cleared by hardware. If the AVDIE bit is set, an
interrupt request is generated when the AVDF bit is set. Refer to Figure 17 for
additional details
0: VDD over AVD threshold
1: VDD under AVD threshold
Bit 0 AVDIE Voltage Detector interrupt enable
This bit is set and cleared by software. It enables an interrupt to be generated when
the AVDF flag is set. The pending interrupt information is automatically cleared
when software enters the AVD interrupt routine.
0: AVD interrupt disabled
1: AVD interrupt enabled
Table 13.
System integrity register map and reset values
Address
(Hex.)
Register
label
765432
10
003Ah
SICSR
reset
value
01100
LVDRF
x
AVDF
0
AVDIE
0
003Eh
AVDTHCR
reset
value
CK2
0
CK1
0
CK0
0
000
AVD1
1
AVD2
1
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相关代理商/技术参数 |
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| ST7PMC1K2B3 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:8-bit MCU with nested interrupts, Flash, 10-bit ADC, brushless motor control, five timers, SPI, LINSCI? |
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