参数资料
型号: ST7PLUSA5B6
厂商: STMICROELECTRONICS
元件分类: 微控制器/微处理器
英文描述: 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP8
封装: 0.300 INCH, ROHS COMPLIANT, PLASTIC, DIP-8
文件页数: 94/136页
文件大小: 1705K
代理商: ST7PLUSA5B6
Obsolete
Product(s)
- Obsolete
Product(s)
Obsolete
Product(s)
- Obsolete
Product(s)
I/O ports
ST7LITEUS2, ST7LITEUS5
Spurious interrupts
When enabling/disabling an external interrupt by setting/resetting the related OR register bit,
a spurious interrupt is generated if the pin level is low and its edge sensitivity includes
falling/rising edge. This is due to the edge detector input which is switched to '1' when the
external interrupt is disabled by the OR register.
To avoid this unwanted interrupt, a "safe" edge sensitivity (rising edge for enabling and
falling edge for disabling) has to be selected before changing the OR register bit and
configuring the appropriate sensitivity again.
Caution:
In case a pin level change occurs during these operations (asynchronous signal input), as
interrupts are generated according to the current sensitivity, it is advised to disable all
interrupts before and to reenable them after the complete previous sequence in order to
avoid an external interrupt occurring on the unwanted edge.
This corresponds to the following steps:
1.
To enable an external interrupt:
a)
Set the interrupt mask with the SIM instruction (in cases where a pin level change
could occur)
b)
Select rising edge
c)
Enable the external interrupt through the OR register
d)
Select the desired sensitivity if different from rising edge
e)
Reset the interrupt mask with the RIM instruction (in cases where a pin level
change could occur)
2. To disable an external interrupt:
a)
Set the interrupt mask with the SIM instruction SIM (in cases where a pin level
change could occur)
b)
Select falling edge
c)
Disable the external interrupt through the OR register
d)
Select rising edge
9.2.2
Output modes
The output configuration is selected by setting the corresponding DDR register bit. In this
case, writing the DR register applies this digital value to the I/O pin through the latch. Then
reading the DR register returns the previously stored value.
Two different output modes can be selected by software through the OR register: Output
push-pull and open-drain.
Table 17.
DR register value and output pin status(1)
1.
When switching from input to output mode, the DR register has to be written first to drive the correct level
on the pin as soon as the port is configured as an output.
DR
Push-pull
Open-drain
0VSS
VSS
1VDD
Floating
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