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参数资料
| 型号： | STK17TA8-W25 |
| 元件分类： | 时钟/数据恢复及定时提取 |
| 英文描述： | REAL TIME CLOCK, PDIP40 |
| 封装： | 0.600 INCH, 0.100 INCH PITCH, PLASTIC, DIP-40 |
| 文件页数： | 12/25页 |
| 文件大小： | 285K |
| 代理商： | STK17TA8-W25 |
STK17TA8
April 2005
Document Control #ML0025 rev 1.1
2
PACKAGES
PIN DESCRIPTIONS
Pin Name
I/O
Description
A16 – A0
Input
Address: The 17 address inputs select one of 131,072 bytes in the nvSRAM array or one of 16 bytes in the clock
register map.
DQ7 –DQ0
I/O
Data: Bi-directional 8-bit data bus for accessing the nvSRAM array and RTC.
E
Input
Chip Enable: The active low E
input selects the device.
W
Input
Write Enable: The active low W enables data on the DQ pins to be written to the address location latched by the
falling edge of E .
G
Input
Output Enable: The active low G input enables the data output buffers during read cycles. De-asserting G high
causes the DQ pins to tri-state.
X1
Output
Crystal Connection, drives crystal on startup.
X2
Input
Crystal Connection for 32.768 kHz crystal.
VRTCcap
Power Supply
Capacitor supplied backup RTC supply voltage. (Left unconnected if VRTCbat is used.)
VRTCbat
Power Supply
Battery supplied backup RTC supply voltage. (Left unconnected if VRTCcap is used.)
VCC
Power Supply
Power 3.0V +20%, -10%
HSB
I/O
Hardware Store Busy: When low this output indicates a Hardware Store is in progress. When pulled low external
to the chip it will initiate a nonvolatile STORE operation. A weak internal pull up resistor keeps this pin high if not
connected. (Connection Optional)
INT
Output
Interrupt Output: Can be programmed to respond to the clock alarm, the watchdog timer and the power monitor.
Programmable to either active high (push/pull) or active low (open-drain).
VCAP
Power Supply
Autostore
Capacitor: Supplies power to nvSRAM during power loss to store data from SRAM to nonvolatile
elements.
VSS
Power Supply
Ground
(Blank)
No Connect
Unlabeled pins have no internal connection.
48 Pin SSOP
VRTCbat
40 Pin PDIP
VCAP
VSS
A16
A14
A12
A7
A6
A5
INT
A4
VCC
A15
A13
A8
DQ0
VSS
VRTCcap
DQ6
A9
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
W
HSB
DQ1
DQ2
X1
G
A3
A2
A1
A0
X2
DQ5
A10
DQ7
DQ4
DQ3
VCC
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
E
A11
VCAP
DQ0
DQ1
DQ2
G
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
VCC
A15
A13
A8
A11
VSS
DQ6
A10
DQ7
DQ5
DQ4
DQ3
A9
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
21
22
23
24
25
26
27
28
29
30
31
32
W
HSB
E
17
18
19
20
33
34
35
36
37
38
39
40
VSS
VCC
INT
VRTCbat
X1
X2
VRTCcap
48 Pin SSOP
Relative PCB area usage.
See website for detailed
package size specifications.
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