参数资料
型号: STM32F103VDT7XXX
厂商: STMICROELECTRONICS
元件分类: 微控制器/微处理器
英文描述: 32-BIT, FLASH, 72 MHz, RISC MICROCONTROLLER, PQFP100
封装: 14 X 14 MM, 0.50 MM PITCH, ROHS COMPLIANT, LQFP-100
文件页数: 81/122页
文件大小: 1599K
代理商: STM32F103VDT7XXX
STM32F103xC, STM32F103xD, STM32F103xE
Electrical characteristics
Doc ID 14611 Rev 6
Figure 23.
Asynchronous non-multiplexed SRAM/PSRAM/NOR read waveforms
1.
Mode 2/B, C and D only. In Mode 1, FSMC_NADV is not used.
Table 31.
Asynchronous non-multiplexed SRAM/PSRAM/NOR read timings(1) (2)
1.
VDD_IO = V and CL = 15 pF.
2.
Based on characterization, not tested in production.
Symbol
Parameter
Min
Max
Unit
tw(NE)
FSMC_NE low time
5THCLK – 1.5
5THCLK + 2
ns
tv(NOE_NE)
FSMC_NEx low to FSMC_NOE low
0.5
1.5
ns
tw(NOE)
FSMC_NOE low time
5THCLK – 1.5
5THCLK + 1.5
ns
th(NE_NOE)
FSMC_NOE high to FSMC_NE high hold time –1.5
ns
tv(A_NE)
FSMC_NEx low to FSMC_A valid
7
ns
th(A_NOE)
Address hold time after FSMC_NOE high
0.1
ns
tv(BL_NE)
FSMC_NEx low to FSMC_BL valid
0
ns
th(BL_NOE)
FSMC_BL hold time after FSMC_NOE high
0
ns
tsu(Data_NE)
Data to FSMC_NEx high setup time
2THCLK + 25
ns
tsu(Data_NOE) Data to FSMC_NOEx high setup time
2THCLK + 25
ns
th(Data_NOE) Data hold time after FSMC_NOE high
0
ns
th(Data_NE)
Data hold time after FSMC_NEx high
0
ns
tv(NADV_NE)
FSMC_NEx low to FSMC_NADV low
5
ns
tw(NADV)
FSMC_NADV low time
THCLK + 1.5
ns
Data
FSMC_NE
FSMC_NBL[1:0]
FSMC_D[15:0]
tv(BL_NE)
t h(Data_NE)
FSMC_NOE
Address
FSMC_A[25:0]
tv(A_NE)
FSMC_NWE
tsu(Data_NE)
tw(NE)
ai14991B
w(NOE)
t
tv(NOE_NE)
t h(NE_NOE)
th(Data_NOE)
t h(A_NOE)
t h(BL_NOE)
tsu(Data_NOE)
FSMC_NADV(1)
t v(NADV_NE)
tw(NADV)
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