参数资料
型号: STM32F105VBH7XXX
厂商: STMICROELECTRONICS
元件分类: 微控制器/微处理器
英文描述: 32-BIT, FLASH, 72 MHz, RISC MICROCONTROLLER, BGA100
封装: ROHS COMPLIANT, LFBGA-100
文件页数: 71/90页
文件大小: 998K
代理商: STM32F105VBH7XXX
STM32F105xx, STM32F107xx
Electrical characteristics
5.3.17
DAC electrical specifications
Table 54.
DAC characteristics
Symbol
Parameter
Min
Typ
Max(1)
Unit
Comments
VDD33A
Analog supply voltage
2.4
3.6
V
VDD18D
Digital supply voltage
1.6
1.8
2
V
VREF+
Reference supply voltage
2.4
3.6
V
VREF+ must always be below
VDD33A
VSSA
Ground
0
V
RL
Resistive load with buffer ON
5
k
Ω
Minimum resistive load between
DAC_OUT and VSSA
CL
Capacitive load
50
pF
Maximum capacitive load at
DAC_OUT pin.
DAC_OUT
min
Lower DAC_OUT voltage with buffer
ON
0.2
V
It gives the maximum output
excursion of the DAC
it corresponds to 12-bit input
code (0E0)h to (F1C)h @ VREF+
= 3.6 V and (155)h and (EAB)h
@ VREF+ = 2.4 V
DAC_OUT
max
Higher DAC_OUT voltage with buffer
ON
VREF+
0.2 V
V
IDD
DAC DC current consumption in
quiescent mode (Standby mode) (in
VDD18D+VDD33A+ VREF+)
425
600
A
With no load, middle code
(800)H on the inputs
500
700
A
With no load, worst code (F1C)H
@ VREF+ = 3.6 V in terms of DC
consumption on the inputs
IDDQ
DAC DC current consumption in
Power Down mode (in
VDD18D+VDD33A+VREF+)
5350
nA
With no load.
DAC DC current consumption in
Power Down mode (in VDD33A+VREF+)
5200
DNL
Differential non linearity (Difference
between two consecutive code-1LSB)
±0.5
LSB
Given for the DAC in 10-bit
configuration (B1=B0=0 always)
INL
Integral non linearity (difference
between measured value at Code i
and the value at Code i on a line
drawn between Code 0 and last Code
1023)
±1
LSB
Given for the DAC in 10-bit
configuration (B1=B0=0 always)
Offset
Offset error
(difference between measured value
at Code (800)H and the ideal value =
VREF+/2
±10
mV
Given for the DAC in 10-bit
configuration (B1=B0=0 always)
±3
LSB
Given for the DAC in 10-bit @
VREF+ = 3.6 V
Gain error
±0.5
%
Given for the DAC in 10-bit
configuration (B1=B0=0 always)
Amplifier
gain
Gain of the amplifier in open loop
80
85
dB
with a 5 k
Ω load (worst case)
相关PDF资料
PDF描述
STM32F105VCH6TR 32-BIT, FLASH, 72 MHz, RISC MICROCONTROLLER, BGA100
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