参数资料
型号: STM32F105VCT6XXX
厂商: STMICROELECTRONICS
元件分类: 微控制器/微处理器
英文描述: 32-BIT, FLASH, 72 MHz, RISC MICROCONTROLLER, PQFP100
封装: 14 X 14 MM, ROHS COMPLIANT, LQFP-100
文件页数: 22/95页
文件大小: 1007K
代理商: STM32F105VCT6XXX
STM32F105xx, STM32F107xx
Pinouts and pin description
Doc ID 15274 Rev 4
29/95
97
-
PE0
I/O FT
PE0
TIM4_ETR
98
-
PE1
I/O FT
PE1
99
63
VSS_3
SVSS_3
100 64
VDD_3
SVDD_3
1. I = input, O = output, S = supply.
2. FT = 5 V tolerant. All I/Os are VDD capable.
3. Function availability depends on the chosen device.
4. If several peripherals share the same I/O pin, to avoid conflict between these alternate functions only one peripheral should
be enabled at a time through the peripheral clock enable bit (in the corresponding RCC peripheral clock enable register).
5. PC13, PC14 and PC15 are supplied through the power switch. Since the switch only sinks a limited amount of current
(3 mA), the use of GPIOs PC13 to PC15 in output mode is limited: the speed should not exceed 2 MHz with a maximum
load of 30 pF and these IOs must not be used as a current source (e.g. to drive an LED).
6. Main function after the first backup domain power-up. Later on, it depends on the contents of the Backup registers even
after reset (because these registers are not reset by the main reset). For details on how to manage these IOs, refer to the
Battery backup domain and BKP register description sections in the STM32F10xxx reference manual, available from the
STMicroelectronics website: www.st.com.
7. This alternate function can be remapped by software to some other port pins (if available on the used package). For more
details, refer to the Alternate function I/O and debug configuration section in the STM32F10xxx reference manual,
available from the STMicroelectronics website: www.st.com.
8. For the LQFP64 package, the pins number 5 and 6 are configured as OSC_IN/OSC_OUT after reset, however the
functionality of PD0 and PD1 can be remapped by software on these pins. For the LQFP100 package, PD0 and PD1 are
available by default, so there is no need for remapping. For more details, refer to Alternate function I/O and debug
configuration section in the STM32F10xxx reference manual.
Table 5.
Pin definitions (continued)
Pins
Pin name
Ty
p
e
(1
)
I/
O
le
vel
(2)
Main
function(3)
(after reset)
Alternate functions(4)
LQ
FP10
0
LQ
FP64
Default
Remap
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STM32F105VBT6TR 32-BIT, FLASH, 72 MHz, RISC MICROCONTROLLER, PQFP100
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