参数资料
型号: SX8725CWLTDT
元件分类: ADC
英文描述: 2-CH 16-BIT PROPRIETARY METHOD ADC, SERIAL/PARALLEL ACCESS, PDSO12
封装: 4 X 4 MM, HALOGEN FREE AND ROHS COMPLIANT, MLPD-12
文件页数: 51/68页
文件大小: 1718K
代理商: SX8725CWLTDT
www.semtech.com/products/
Page 55
ADVANCED COMMUNICATIONS & SENSING
DATASHEET
SX8725C
ZoomingADC for sensing data acquisition
Revision 1.01
January 2011
Semtech
VN1, VN2, and VN3 are the output rms noise figures of Table 39, GD1, GD2, and GD3 are the PGA gains of stages 1 to 3
respectively. VREFN,WB is the wide band noise on the reference voltage.
The simple noise model of Figure 46 is used to estimate the equivalent input referred rms noise VN,IN of the acquisition
chain in the model of Figure 48, page 56. This is given by the relationship:
On the numerator of Equation 28 :
1 the first parenthesis is the PGA1 gain amplifier contribution to noise
2 the second parenthesis is the PGA2 gain amplifier contribution to noise
3 the third parenthesis is the PGA3 gain amplifier contribution to noise
4 the fourth parenthesis is PGA2 and PGA3 offset amplifiers contributions to noise
5 the last parenthesis is the contribution of the noise on the references of the ADC
Figure 46. Simple Noise Model for PGAs and ADC
Equation 28
PGA1
PGA2
PGA3
ADC
±Vin
±Voff
±Vref
Analog
Inputs
Reference
Inputs
VIN,ADC
VREF,ADC
VSS
VREF
AC2
AC3
N.C.
VSS
VBATT
VSS
VREF
S
VREFN,WB
VN1
VN2
VN3
VIN
gains:
offsets:
GD1
GD2
GDOFF2
GD3
GDOFF3
(
)
()
[]
rms
V
N
OSR
GD
V
GD
V
GD
V
GD
V
GD
V
ELCONV
TOT
WB
REFN
TOT
OFF
WB
REFN
TOT
N
IN
N
2
,
2
3
2
,
2
3
2
1
2
1
2
,
2
1
+
+
+
+
+
=
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