参数资料
型号: SX8725CWLTDT
元件分类: ADC
英文描述: 2-CH 16-BIT PROPRIETARY METHOD ADC, SERIAL/PARALLEL ACCESS, PDSO12
封装: 4 X 4 MM, HALOGEN FREE AND ROHS COMPLIANT, MLPD-12
文件页数: 53/68页
文件大小: 1718K
代理商: SX8725CWLTDT
www.semtech.com/products/
Page 57
ADVANCED COMMUNICATIONS & SENSING
DATASHEET
SX8725C
ZoomingADC for sensing data acquisition
Revision 1.01
January 2011
Semtech
11.5 Gain Error and Offset Error
Gain error is defined as the amount of deviation between the ideal transfer function (theoretical Equation 19, page
33) and the measured transfer function (with the offset error removed).
The actual gain of the different stages can vary depending on the fabrication tolerances of the different elements.
Although these tolerances are specified to a maximum of ±3%, they will be most of the time around ±0.5%. Moreover,
the tolerances between the different stages are not correlated and the probability to get the maximal error in the same
direction in all stages is very low. Finally, these gain errors can be calibrated by the software at the same time with the
gain errors of the sensor for instance.
Figure 49 shows gain error drift vs. temperature for different PGA gains. The curves are expressed in % of Full-Scale
Range (FSR) normalized to 25°C.
Offset error is defined as the output code error for a zero volt input (ideally, output code = 0). The offset of the ADC and
the PGA1 stage are completely suppressed if NELCONV > 1.
The measured offset drift vs. temperature curves for different PGA gains are depicted in Figure 50. The output offset
error, expressed in LSB for 16-bit setting, is normalized to 25°C. Notice that if the ADC is used alone, the output offset
error is below +/-1 LSB and has no drift.
Figure 49. Gain Error vs. Temperature for Different Gains
Figure 50. Offset Error vs. Temperature for Different Gains
NORMALIZED TO 25°C
-0.4
-0.3
-0.2
-0.1
0.0
0.1
0.2
-50
-25
0
25
50
75
100
Temperature [°C]
Ga
in
Er
ro
r
[%
o
fF
S
R
]
1
5
20
100
NORMALIZED TO 25°C
-40
-20
0
20
40
60
80
100
-50
-25
0
25
50
75
100
Temperature [°C]
O
ut
pu
tO
ffs
et
E
rr
or
[L
S
B
]
1
5
20
100
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SX8725E083TRT 3-CH 16-BIT PROPRIETARY METHOD ADC, SERIAL ACCESS, PDSO12
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