参数资料
| 型号： | SY89228UMG |
| 厂商： | Micrel Inc |
| 文件页数： | 1/16页 |
| 文件大小： | 0K |
| 描述： | IC CLK DIVIDER /3/5 LVPECL 16MLF |
| 标准包装： | 100 |
| 系列： | Precision Edge® |
| 类型： | 时钟除法器 |
| PLL： | 无 |
| 输入： | CML，LVDS，PECL |
| 输出： | LVPECL |
| 电路数： | 1 |
| 比率 - 输入:输出： | 1:1 |
| 差分 - 输入:输出： | 是/是 |
| 频率 - 最大： | 1.5GHz |
| 除法器/乘法器： | 是/无 |
| 电源电压： | 2.375 V ~ 3.6 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-VFQFN 裸露焊盘，16-MLF? |
| 供应商设备封装： | 16-MLF?（3x3） |
| 包装： | 管件 |
| 产品目录页面： | 1083 (CN2011-ZH PDF) |
| 其它名称： | 576-1650-5 |
SY89228U
1GHz Precision, LVPECL ÷3, ÷5 Clock Divider
with Fail-Safe Input and Internal Termination
Precision Edge is a registered trademark of Micrel, Inc.
Micrel Inc. 2180 Fortune Drive San Jose, CA 95131 USA tel +1 (408) 944-0800 fax + 1 (408) 474-1000 http://www.micrel.com
August 2007
M9999-080707-A
hbwhelp@micrel.com or (408) 955-1690
General Description
The SY89228U is a precision, low jitter 1GHz
÷3, ÷5
clock divider with an LVPECL output. A unique Fail-
Safe Input (FSI) protection prevents metastable
output conditions when the input clock voltage swing
drops significantly below 100mV or input is removed.
The differential input includes Micrel’s unique, 3-pin
internal termination architecture that allows the input
to interface to any differential signal (AC- or DC-
coupled) as small as 100mV (200mVPP) without any
level shifting or termination resistor networks in the
signal
path.
The
outputs
are
800mV,
100K-
compatible
LVPECL
with
fast
rise/fall
times
guaranteed to be less than 270ps.
The SY89228U operates from a 2.5V ±5% or 3.3V
±10% supply and is guaranteed over the full
industrial temperature range of –40°C to +85°C. The
SY89228U is part of Micrel’s high-speed, Precision
Edge
product line.
All support documentation can be found on Micrel’s
web site at: www.micrel.com.
Block Diagram
Precision Edge
Features
Accepts a high-speed input and provides a precision
÷3 and ÷5 sub-rate, LVPECL output
Fail-Safe Input
–
Prevents oscillations when input is invalid
Guaranteed AC performance over temperature and
supply voltage:
–
DC-to >1.0GHz throughput
– < 1500ps Propagation Delay (In-to-Q)
– < 270ps Rise/Fall times
Ultra-low jitter design:
– <1psRMS random jitter
– <1psRMS cycle-to-cycle jitter
– <10psPP total jitter (clock)
– <0.7psRMS MUX crosstalk induced jitter
Unique patented internal termination and VT pin
accepts DC- and AC-coupled inputs (CML, PECL,
LVDS)
Wide input voltage range VCC to GND
800mV LVPECL output
46% to 54% Duty Cycle(÷ 3)
47% to 53% Duty Cycle(÷ 5)
2.5V ±5% or 3.3V ±10% supply voltage
-40°C to +85°C industrial temperature range
Available in 16-pin (3mm x 3mm) QFN package
Applications
Fail-safe clock protection
Markets
LAN/WAN
Enterprise servers
ATE
Test and measurement
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相关代理商/技术参数 |
参数描述 |
|---|---|
| SY89228UMG TR | 功能描述:时钟驱动器及分配 Divide-by-3 and 5 LVPECL Clock Divider with Internal Termination and FSI (1GHz) RoHS:否 制造商:Micrel 乘法/除法因子:1:4 输出类型:Differential 最大输出频率:4.2 GHz 电源电压-最大: 电源电压-最小:5 V 最大工作温度:+ 85 C 封装 / 箱体:SOIC-8 封装:Reel |
| SY89228UMGTR | 制造商:MICREL 制造商全称:Micrel Semiconductor 功能描述:1GHz Precision, LVPECL ÷3, ÷5 Clock Divider |
| SY89229U | 制造商:MICREL 制造商全称:Micrel Semiconductor 功能描述:1GHz Precision, LVPECL ±3, ±5 Clock Divider with Fail-Safe Input and Internal Termination |
| SY89229UMG | 功能描述:时钟驱动器及分配 Divide-by-3 and 5 LVDS Clock Divider with Internal Termination and FSI (1GHz) RoHS:否 制造商:Micrel 乘法/除法因子:1:4 输出类型:Differential 最大输出频率:4.2 GHz 电源电压-最大: 电源电压-最小:5 V 最大工作温度:+ 85 C 封装 / 箱体:SOIC-8 封装:Reel |
| SY89229UMG TR | 功能描述:时钟驱动器及分配 Divide-by-3 and 5 LVDS Clock Divider with Internal Termination and FSI (1GHz) RoHS:否 制造商:Micrel 乘法/除法因子:1:4 输出类型:Differential 最大输出频率:4.2 GHz 电源电压-最大: 电源电压-最小:5 V 最大工作温度:+ 85 C 封装 / 箱体:SOIC-8 封装:Reel |
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